| /art/compiler/optimizing/ |
| D | common_arm.h | 42 return dwarf::Reg::ArmCore(static_cast<int>(reg.GetCode())); in DWARFReg()
46 return dwarf::Reg::ArmFp(static_cast<int>(reg.GetCode())); in DWARFReg()
159 vixl::aarch32::DRegister d = vixl::aarch32::DRegister(s.GetCode() / 2); in DRegisterFromS()
213 return Location::RegisterLocation(reg.GetCode()); in LocationFrom()
217 return Location::FpuRegisterLocation(reg.GetCode()); in LocationFrom()
222 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
227 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
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| D | code_generator_arm64.h | 102 return Location::RegisterLocation(vixl::aarch64::x15.GetCode()); in FixedTempLocation()
111 ? vixl::aarch64::x21.GetCode()
112 : vixl::aarch64::x20.GetCode()),
113 vixl::aarch64::x30.GetCode());
116 vixl::aarch64::d8.GetCode(),
117 vixl::aarch64::d15.GetCode());
800 DCHECK(reg < vixl::aarch64::lr.GetCode() && in CheckValidReg()
801 reg != vixl::aarch64::ip0.GetCode() && in CheckValidReg()
802 reg != vixl::aarch64::ip1.GetCode()) << reg; in CheckValidReg()
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| D | optimizing_compiler.cc | 1233 jni_compiled_method.GetCode(), in JniCompile()
1301 jni_compiled_method.GetCode().data(), in JitCompile()
1302 jni_compiled_method.GetCode().size(), in JitCompile()
1314 const uintptr_t code_address = reinterpret_cast<uintptr_t>(method_header->GetCode()); in JitCompile()
1328 info.code_size = jni_compiled_method.GetCode().size(); in JitCompile()
1337 jit_logger->WriteLog(code, jni_compiled_method.GetCode().size(), method); in JitCompile()
1423 const uintptr_t code_address = reinterpret_cast<uintptr_t>(method_header->GetCode()); in JitCompile()
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| D | common_arm64.h | 201 return Location::RegisterLocation(ARTRegCodeFromVIXL(reg.GetCode())); in LocationFrom()
205 return Location::FpuRegisterLocation(fpreg.GetCode()); in LocationFrom()
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| D | code_generator_arm64.cc | 155 caller_saves.Add(Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in OneRegInReferenceOutSaveEverythingCallerSaves()
156 DCHECK_EQ(calling_convention.GetRegisterAt(0).GetCode(), in OneRegInReferenceOutSaveEverythingCallerSaves()
158 DataType::Type::kReference).GetCode()); in OneRegInReferenceOutSaveEverythingCallerSaves()
761 size_t ref = static_cast<int>(XRegisterFrom(ref_).GetCode()); in FindAvailableCallerSaveRegister()
762 size_t obj = static_cast<int>(XRegisterFrom(obj_).GetCode()); in FindAvailableCallerSaveRegister()
1216 blocked_core_registers_[reserved_core_registers.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters()
1222 blocked_fpu_registers_[reserved_fp_registers.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters()
1231 blocked_fpu_registers_[reserved_fp_registers_debuggable.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters()
2693 caller_saves.Add(Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in VisitBoundsCheck()
2694 caller_saves.Add(Location::RegisterLocation(calling_convention.GetRegisterAt(1).GetCode())); in VisitBoundsCheck()
[all …]
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| D | code_generator_arm_vixl.cc | 127 DCHECK_EQ(raw_adr[3] & 0x8fu, rd_.GetCode()); // Check bits 8-11 and 15. in ~EmitAdrCode()
752 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out.GetCode())); in EmitNativeCode()
779 DCHECK(locations->GetLiveRegisters()->ContainsCoreRegister(index_reg.GetCode())); in EmitNativeCode()
780 if (codegen->IsCoreCalleeSaveRegister(index_reg.GetCode())) { in EmitNativeCode()
877 uint32_t ref = RegisterFrom(ref_).GetCode(); in FindAvailableCallerSaveRegister()
878 uint32_t obj = RegisterFrom(obj_).GetCode(); in FindAvailableCallerSaveRegister()
917 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(reg_out.GetCode())); in EmitNativeCode()
1028 for (uint32_t i = regs.GetFirstSRegister().GetCode(); in ComputeSRegisterListMask()
1029 i <= regs.GetLastSRegister().GetCode(); in ComputeSRegisterListMask()
2047 for (uint32_t i = kFpuCalleeSaves.GetFirstSRegister().GetCode(); in SetupBlockedRegisters()
[all …]
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| D | code_generator_arm_vixl.h | 786 DCHECK(reg < vixl::aarch32::ip.GetCode() && reg != mr.GetCode()) << reg; in CheckValidReg()
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| D | intrinsics_arm_vixl.cc | 226 Thread::ReadBarrierMarkEntryPointsOffset<kArmPointerSize>(tmp.GetCode()); in EmitNativeCode()
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| D | intrinsics_arm64.cc | 2840 Location::RegisterLocation(calling_convention.GetRegisterAt(0).GetCode())); in VisitIntegerValueOf()
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| /art/compiler/utils/arm/ |
| D | assembler_arm_vixl.cc | 252 CHECK_NE(base.GetCode(), kIpCode); in StoreToOffset()
253 if ((reg.GetCode() != kIpCode) && in StoreToOffset()
255 ((type != kStoreWordPair) || (reg.GetCode() + 1 != kIpCode))) { in StoreToOffset()
264 tmp_reg = (base.GetCode() != 5) ? r5 : r6; in StoreToOffset()
266 if (base.GetCode() == kSpCode) { in StoreToOffset()
287 ___ Strd(reg, vixl32::Register(reg.GetCode() + 1), MemOperand(base, offset)); in StoreToOffset()
293 if ((tmp_reg.IsValid()) && (tmp_reg.GetCode() != kIpCode)) { in StoreToOffset()
348 ___ Ldrd(dest, vixl32::Register(dest.GetCode() + 1), MemOperand(base, offset)); in LoadFromOffset()
392 DCHECK_EQ(regs & (1u << base.GetCode()), 0u); in StoreRegisterList()
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| D | jni_macro_assembler_arm_vixl.cc | 72 return dwarf::Reg::ArmCore(static_cast<int>(reg.GetCode())); in DWARFReg()
76 return dwarf::Reg::ArmFp(static_cast<int>(reg.GetCode())); in DWARFReg()
199 DCHECK_EQ(core_spill_mask & (1 << temp.GetCode()), 0) in RemoveFrame()
200 << "core_spill_mask hould not contain scratch register R" << temp.GetCode(); in RemoveFrame()
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| /art/disassembler/ |
| D | disassembler_arm64.cc | 48 if (reg.GetCode() == TR) { in AppendRegisterNameToOutput()
51 } else if (reg.GetCode() == LR) { in AppendRegisterNameToOutput()
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 108 return dwarf::Reg::Arm64Fp(reg.GetCode()); in DWARFReg()
110 DCHECK_LT(reg.GetCode(), 31u); // X0 - X30. in DWARFReg()
111 return dwarf::Reg::Arm64Core(reg.GetCode()); in DWARFReg()
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| D | jni_macro_assembler_arm64.cc | 696 core_reg_list.Combine(reg_x(reg.AsXRegister()).GetCode()); in BuildFrame()
699 fp_reg_list.Combine(reg_d(reg.AsDRegister()).GetCode()); in BuildFrame()
752 core_reg_list.Combine(reg_x(reg.AsXRegister()).GetCode()); in RemoveFrame()
755 fp_reg_list.Combine(reg_d(reg.AsDRegister()).GetCode()); in RemoveFrame()
788 << "core_reg_list should contain Marking Register X" << mr.GetCode(); in RemoveFrame()
800 << "core_reg_list should not contain scratch register X" << temp.GetCode(); in RemoveFrame()
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| /art/runtime/jit/ |
| D | jit_code_cache.cc | 147 const void* GetCode() const { in GetCode() function in art::jit::JitCodeCache::JniStubData
152 return GetCode() != nullptr; in IsCompiled()
526 return data.GetCode(); in GetJniStubCode()
830 FreeCodeAndData(method_header->GetCode()); in FreeAllMethodHeaders()
851 method_headers.insert(OatQuickMethodHeader::FromCodePointer(it->second.GetCode())); in RemoveMethodsIn()
1236 FreeCodeAndData(it->second.GetCode()); in RemoveMethodLocked()
1416 const void* code = method_header->GetCode(); in Run()
1439 const void* code = method_header->GetCode(); in Run()
1601 if (!data.IsCompiled() || IsInZygoteExecSpace(data.GetCode())) { in GarbageCollectCache()
1607 OatQuickMethodHeader::FromCodePointer(data.GetCode()); in GarbageCollectCache()
[all …]
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| /art/compiler/jni/quick/ |
| D | jni_compiler.h | 50 ArrayRef<const uint8_t> GetCode() const { return ArrayRef<const uint8_t>(code_); } in GetCode() function
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| /art/compiler/driver/ |
| D | compiled_method_storage.cc | 134 ArrayRef<const uint8_t> GetCode() const { in GetCode() function in art::CompiledMethodStorage::ThunkMapValue
243 return value.GetCode(); in GetThunkCode()
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| /art/runtime/ |
| D | oat_quick_method_header.h | 74 const uint8_t* GetCode() const { in GetCode() function
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| D | art_method.cc | 658 << " " << (uintptr_t)(method_header->GetCode() + method_header->GetCodeSize()); in GetOatQuickMethodHeader()
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| /art/dex2oat/linker/ |
| D | relative_patcher_test.h | 289 *code = value.GetCode(); in GetThunkCode()
331 ArrayRef<const uint8_t> GetCode() const { return ArrayRef<const uint8_t>(code_); } in GetCode() function
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| /art/dex2oat/linker/arm/ |
| D | relative_patcher_arm_base.cc | 48 ArrayRef<const uint8_t> GetCode() const { in GetCode() function in art::linker::ArmBaseRelativePatcher::ThunkData
216 if (UNLIKELY(!WriteThunk(out, pending_thunks_.front()->GetCode()))) { in WriteThunks()
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| /art/oatdump/ |
| D | oatdump.cc | 1225 : method_header->GetCode() - oat_file_.Begin(); in DumpOatMethod()
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