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Searched refs:HVecUShr (Results 1 – 9 of 9) sorted by relevance

/art/compiler/optimizing/
Dscheduler_arm64.cc306 void SchedulingLatencyVisitorARM64::VisitVecUShr(HVecUShr* instr) { in VisitVecUShr()
Dnodes_vector.h874 class HVecUShr final : public HVecBinaryOperation {
876 HVecUShr(ArenaAllocator* allocator, in HVecUShr() function
Dcode_generator_vector_arm_vixl.cc712 void LocationsBuilderARMVIXL::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
716 void InstructionCodeGeneratorARMVIXL::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
Dcode_generator_vector_x86.cc976 void LocationsBuilderX86::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
980 void InstructionCodeGeneratorX86::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
Dcode_generator_vector_x86_64.cc959 void LocationsBuilderX86_64::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
963 void InstructionCodeGeneratorX86_64::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
Dcode_generator_vector_mips64.cc904 void LocationsBuilderMIPS64::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
908 void InstructionCodeGeneratorMIPS64::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
Dcode_generator_vector_mips.cc905 void LocationsBuilderMIPS::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
909 void InstructionCodeGeneratorMIPS::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
Dcode_generator_vector_arm64.cc932 void LocationsBuilderARM64::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
936 void InstructionCodeGeneratorARM64::VisitVecUShr(HVecUShr* instruction) { in VisitVecUShr()
Dloop_optimization.cc1980 new (global_allocator_) HVecUShr(global_allocator_, opa, opb, type, vector_length_, dex_pc), in GenerateVecOp()