Searched refs:IlvlW (Results 1 – 8 of 8) sorted by relevance
| /art/compiler/optimizing/ |
| D | code_generator_vector_mips64.cc | 197 __ IlvlW(dst, tmp, tmp); in VisitVecReduce() local
203 __ IlvlW(dst, tmp, tmp); in VisitVecReduce() local
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| D | code_generator_vector_mips.cc | 199 __ IlvlW(dst, tmp, tmp); in VisitVecReduce() local
205 __ IlvlW(dst, tmp, tmp); in VisitVecReduce() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips32r6_test.cc | 2368 TEST_F(AssemblerMIPS32r6Test, IlvlW) { in TEST_F() argument
2369 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvlW, "ilvl.w ${reg1}, ${reg2}, ${reg3}"), "ilvl.w"); in TEST_F()
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| D | assembler_mips.h | 724 void IlvlW(VectorRegister wd, VectorRegister ws, VectorRegister wt);
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| D | assembler_mips.cc | 2596 void MipsAssembler::IlvlW(VectorRegister wd, VectorRegister ws, VectorRegister wt) { in IlvlW() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 3622 TEST_F(AssemblerMIPS64Test, IlvlW) { in TEST_F() argument
3623 DriverStr(RepeatVVV(&mips64::Mips64Assembler::IlvlW, "ilvl.w ${reg1}, ${reg2}, ${reg3}"), in TEST_F()
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| D | assembler_mips64.h | 831 void IlvlW(VectorRegister wd, VectorRegister ws, VectorRegister wt);
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| D | assembler_mips64.cc | 2122 void Mips64Assembler::IlvlW(VectorRegister wd, VectorRegister ws, VectorRegister wt) { in IlvlW() function in art::mips64::Mips64Assembler
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