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Searched refs:Swc1 (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/mips/
Dassembler_mips.h558 void Swc1(FRegister ft, Register rs, uint16_t imm16);
1051 Swc1(reg, base, offset);
1066 Swc1(reg, base, offset);
1068 Swc1(static_cast<FRegister>(reg + 1), base, offset + kMipsWordSize);
1072 Swc1(reg, base, offset);
Dassembler_mips_test.cc850 TEST_F(AssemblerMIPSTest, Swc1) { in TEST_F() argument
851 DriverStr(RepeatFRIb(&mips::MipsAssembler::Swc1, -16, "swc1 ${reg1}, {imm}(${reg2})"), "Swc1"); in TEST_F()
Dassembler_mips.cc1795 void MipsAssembler::Swc1(FRegister ft, Register rs, uint16_t imm16) { in Swc1() function in art::mips::MipsAssembler
/art/compiler/utils/mips64/
Dassembler_mips64.h662 void Swc1(FpuRegister ft, GpuRegister rs, uint16_t imm16);
1278 Swc1(reg, base, offset);
1285 Swc1(reg, base, offset);
Dassembler_mips64_test.cc771 TEST_F(AssemblerMIPS64Test, Swc1) { in TEST_F() argument
772 DriverStr(RepeatFRIb(&mips64::Mips64Assembler::Swc1, -16, "swc1 ${reg1}, {imm}(${reg2})"), in TEST_F()
Dassembler_mips64.cc1297 void Mips64Assembler::Swc1(FpuRegister ft, GpuRegister rs, uint16_t imm16) { in Swc1() function in art::mips64::Mips64Assembler