| /art/runtime/interpreter/ |
| D | safe_math.h | 27 template <typename T1, typename T2>
29 typedef typename std::conditional<sizeof(T1) >= sizeof(T2), T1, T2>::type type;
33 template<template <typename OpT> class Op, typename T1, typename T2>
34 static inline typename select_bigger<T1, T2>::type SafeMath(T1 a, T2 b) { in SafeMath()
35 typedef typename select_bigger<T1, T2>::type biggest_T; in SafeMath()
38 static_assert(std::is_signed<T2>::value, "Expected T2 to be signed"); in SafeMath()
45 template<typename T1, typename T2>
46 static inline typename select_bigger<T1, T2>::type SafeAdd(T1 a, T2 b) { in SafeAdd()
51 template<typename T1, typename T2>
52 static inline typename select_bigger<T1, T2>::type SafeSub(T1 a, T2 b) { in SafeSub()
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| /art/test/1962-multi-thread-events/src/art/ |
| D | Test1962.java | 56 Thread T2 = new Thread(threadRun, "T2 Thread"); in doTest() local
58 T2.start(); in doTest()
64 setupThread(T2, t2Events, target); in doTest()
69 T2.join(); in doTest()
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| /art/libartbase/base/ |
| D | bit_struct.h | 146 template <typename T2>
147 T2& Assign(T2& what, T value) { in Assign()
151 static_assert(std::is_base_of<BitStructField, T2>::value, "T2 must inherit BitStructField"); in Assign()
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| D | bit_utils.h | 444 template <typename T, typename T2>
445 inline static constexpr T BitFieldInsert(T value, T2 data, size_t lsb, size_t width) { in BitFieldInsert()
448 DCHECK_GE(MaxInt<T2>(width), data) << "Data out of range [too large] for bitwidth"; in BitFieldInsert()
449 DCHECK_LE(MinInt<T2>(width), data) << "Data out of range [too small] for bitwidth"; in BitFieldInsert()
451 DCHECK_EQ(static_cast<T2>(0), data) << "Data out of range [nonzero] for bitwidth 0"; in BitFieldInsert()
453 const auto data_mask = MaskLeastSignificant<T2>(width); in BitFieldInsert()
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| /art/test/1962-multi-thread-events/ |
| D | expected.txt | 4 Hit event on T2 Thread
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| /art/cmdline/ |
| D | cmdline_parse_result.h | 113 template <typename T2>
114 static CmdlineParseResult<T> CastError(const CmdlineParseResult<T2>& other) { in CastError()
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| /art/cmdline/detail/ |
| D | cmdline_parser_detail.h | 33 template <typename T2, typename TStream2 = std::ostream>
45 decltype(InsertionOperatorTest(FakeReference<TStream2>(), std::declval<T2>()))::value;
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| /art/runtime/verifier/ |
| D | verifier_deps.cc | 619 template<typename T1, typename T2>
620 static inline void EncodeTuple(std::vector<uint8_t>* out, const std::tuple<T1, T2>& t) { in EncodeTuple()
625 template<typename T1, typename T2>
626 static inline void DecodeTuple(const uint8_t** in, const uint8_t* end, std::tuple<T1, T2>* t) { in DecodeTuple()
628 T2 v2 = Decode<T2>(DecodeUint32WithOverflowCheck(in, end)); in DecodeTuple()
632 template<typename T1, typename T2, typename T3>
633 static inline void EncodeTuple(std::vector<uint8_t>* out, const std::tuple<T1, T2, T3>& t) { in EncodeTuple() argument
639 template<typename T1, typename T2, typename T3>
640 static inline void DecodeTuple(const uint8_t** in, const uint8_t* end, std::tuple<T1, T2, T3>* t) { in DecodeTuple() argument
642 T2 v2 = Decode<T2>(DecodeUint32WithOverflowCheck(in, end)); in DecodeTuple()
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 82 registers_.push_back(new mips::Register(mips::T2)); in SetUpHelpers()
115 secondary_register_names_.emplace(mips::Register(mips::T2), "t2"); in SetUpHelpers()
2313 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
2318 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
2321 __ Or(mips::T1, mips::T2, mips::T3); in TEST_F()
2322 __ Bne(mips::T2, mips::T1, &label1); // T1 dependency. in TEST_F()
2324 __ And(mips::T0, mips::T1, mips::T2); in TEST_F()
2366 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
2368 __ Beq(mips::T1, mips::T2, &label2); // No preceding or target instruction for the delay slot. in TEST_F()
2464 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
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| D | assembler_mips32r5_test.cc | 101 registers_.push_back(new mips::Register(mips::T2)); in SetUpHelpers()
134 secondary_register_names_.emplace(mips::Register(mips::T2), "t2"); in SetUpHelpers()
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| D | assembler_mips32r6_test.cc | 114 registers_.push_back(new mips::Register(mips::T2)); in SetUpHelpers()
147 secondary_register_names_.emplace(mips::Register(mips::T2), "t2"); in SetUpHelpers()
1509 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
1514 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
1519 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
1524 __ Addu(mips::T0, mips::T1, mips::T2); in TEST_F()
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| /art/runtime/arch/mips/ |
| D | registers_mips.h | 38 T2 = 10, // Temporaries. enumerator
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| D | callee_save_frame_mips.h | 60 (1 << art::mips::T0) | (1 << art::mips::T1) | (1 << art::mips::T2) | (1 << art::mips::T3) |
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| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 42 T2 = 14, enumerator
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| D | callee_save_frame_mips64.h | 48 (1 << art::mips64::T1) | (1 << art::mips64::T2) | (1 << art::mips64::T3) |
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| /art/runtime/ |
| D | subtype_check_test.cc | 599 template <typename T, typename T2>
603 T2 transition_func, in EnsureStateChangedTestRecursiveGeneric()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 116 registers_.push_back(new mips64::GpuRegister(mips64::T2)); in SetUpHelpers()
149 secondary_register_names_.emplace(mips64::GpuRegister(mips64::T2), "t2"); in SetUpHelpers()
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.cc | 518 DCHECK((V0 <= ref_reg && ref_reg <= T2) || in EmitNativeCode()
617 DCHECK((V0 <= ref_reg && ref_reg <= T2) || in EmitNativeCode()
5162 if (reg >= V0 && reg <= T2) { // 13 consequtive regs. in GetBakerMarkThunkNumber()
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