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Searched refs:VRegA_22s (Results 1 – 5 of 5) sorted by relevance

/art/libdexfile/dex/
Ddex_instruction.h329 uint4_t VRegA_22s() const { in VRegA_22s() function
330 return VRegA_22s(Fetch16(0)); in VRegA_22s()
381 uint4_t VRegA_22s(uint16_t inst_data) const;
Ddex_instruction-inl.h73 case k22s: return VRegA_22s(); in VRegA()
153 inline uint4_t Instruction::VRegA_22s(uint16_t inst_data) const { in VRegA_22s() function
Ddex_instruction.cc267 …case k22s: os << StringPrintf("%s v%d, v%d, #%+d", opcode, VRegA_22s(), VRegB_22s(), VRegC_22s())… in DumpString()
/art/runtime/interpreter/
Dinterpreter_switch_impl-inl.h2393 shadow_frame.SetVReg(inst->VRegA_22s(inst_data), in ADD_INT_LIT16()
2400 shadow_frame.SetVReg(inst->VRegA_22s(inst_data), in RSUB_INT()
2407 shadow_frame.SetVReg(inst->VRegA_22s(inst_data), in MUL_INT_LIT16()
2414 bool success = DoIntDivide(shadow_frame, inst->VRegA_22s(inst_data), in DIV_INT_LIT16()
2421 bool success = DoIntRemainder(shadow_frame, inst->VRegA_22s(inst_data), in REM_INT_LIT16()
2428 shadow_frame.SetVReg(inst->VRegA_22s(inst_data), in AND_INT_LIT16()
2435 shadow_frame.SetVReg(inst->VRegA_22s(inst_data), in OR_INT_LIT16()
2442 shadow_frame.SetVReg(inst->VRegA_22s(inst_data), in XOR_INT_LIT16()
/art/runtime/verifier/
Dregister_line.cc317 const uint32_t vregA = is_lit16 ? inst->VRegA_22s() : inst->VRegA_22b(); in CheckLiteralOp()