| /art/compiler/utils/x86/ |
| D | jni_macro_assembler_x86.h | 105 void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, ManagedRegister scratch,
|
| D | jni_macro_assembler_x86.cc | 370 void X86JNIMacroAssembler::Copy(ManagedRegister dest_base, in Copy() argument
378 __ popl(Address(dest_base.AsX86().AsCpuRegister(), dest_offset)); in Copy()
|
| /art/compiler/utils/x86_64/ |
| D | jni_macro_assembler_x86_64.h | 113 void Copy(ManagedRegister dest_base,
|
| D | jni_macro_assembler_x86_64.cc | 421 void X86_64JNIMacroAssembler::Copy(ManagedRegister dest_base, in Copy() argument
429 __ popq(Address(dest_base.AsX86_64().AsCpuRegister(), dest_offset)); in Copy()
|
| /art/compiler/utils/arm/ |
| D | jni_macro_assembler_arm_vixl.h | 122 void Copy(ManagedRegister dest_base,
|
| D | jni_macro_assembler_arm_vixl.cc | 448 void ArmVIXLJNIMacroAssembler::Copy(ManagedRegister dest_base ATTRIBUTE_UNUSED, in Copy()
|
| /art/compiler/utils/ |
| D | jni_macro_assembler.h | 138 virtual void Copy(ManagedRegister dest_base,
|
| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.h | 107 void Copy(ManagedRegister dest_base,
|
| /art/compiler/optimizing/ |
| D | intrinsics_mips64.cc | 1900 GpuRegister dest_base = locations->GetTemp(0).AsRegister<GpuRegister>(); in VisitSystemArrayCopyChar() local
1958 __ Daddiu64(dest_base, dest, data_offset + char_size * dest_pos_const, TMP); in VisitSystemArrayCopyChar()
1960 __ Daddiu64(dest_base, dest, data_offset, TMP); in VisitSystemArrayCopyChar()
1961 __ Dlsa(dest_base, dest_pos.AsRegister<GpuRegister>(), dest_base, char_shift); in VisitSystemArrayCopyChar()
1968 __ Sh(TMP, dest_base, 0); in VisitSystemArrayCopyChar()
1969 __ Daddiu(dest_base, dest_base, char_size); in VisitSystemArrayCopyChar()
|
| D | intrinsics_mips.cc | 2520 Register dest_base = locations->GetTemp(0).AsRegister<Register>(); in VisitSystemArrayCopyChar() local
2577 __ Addiu32(dest_base, dest, data_offset + char_size * dest_pos_const, TMP); in VisitSystemArrayCopyChar()
2579 __ Addiu32(dest_base, dest, data_offset, TMP); in VisitSystemArrayCopyChar()
2580 __ ShiftAndAdd(dest_base, dest_pos.AsRegister<Register>(), dest_base, char_shift); in VisitSystemArrayCopyChar()
2587 __ Sh(TMP, dest_base, 0); in VisitSystemArrayCopyChar()
2588 __ Addiu(dest_base, dest_base, char_size); in VisitSystemArrayCopyChar()
|
| D | intrinsics_x86_64.cc | 741 CpuRegister dest_base = locations->GetTemp(1).AsRegister<CpuRegister>(); in VisitSystemArrayCopyChar() local
742 DCHECK_EQ(dest_base.AsRegister(), RDI); in VisitSystemArrayCopyChar()
797 __ leal(dest_base, Address(dest, char_size * dest_pos_const + data_offset)); in VisitSystemArrayCopyChar()
799 __ leal(dest_base, Address(dest, dest_pos.AsRegister<CpuRegister>(), in VisitSystemArrayCopyChar()
|
| D | intrinsics_x86.cc | 933 Register dest_base = locations->GetTemp(1).AsRegister<Register>(); in VisitSystemArrayCopyChar() local
934 DCHECK_EQ(dest_base, EDI); in VisitSystemArrayCopyChar()
990 __ leal(dest_base, Address(dest, char_size * destPos_const + data_offset)); in VisitSystemArrayCopyChar()
992 __ leal(dest_base, Address(dest, destPos.AsRegister<Register>(), in VisitSystemArrayCopyChar()
|
| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 3895 void Mips64Assembler::Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, in Copy() argument
3901 StoreToOffset(kStoreDoubleword, scratch, dest_base.AsMips64().AsGpuRegister(), in Copy()
3905 StoreToOffset(kStoreDoubleword, scratch, dest_base.AsMips64().AsGpuRegister(), in Copy()
|
| D | assembler_mips64.h | 1383 void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src,
|
| /art/compiler/utils/mips/ |
| D | assembler_mips.h | 1300 void Copy(ManagedRegister dest_base,
|
| D | assembler_mips.cc | 5078 void MipsAssembler::Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, in Copy() argument
5083 StoreToOffset(kStoreWord, scratch, dest_base.AsMips().AsCoreRegister(), dest_offset.Int32Value()); in Copy()
|