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Searched refs:df (Results 1 – 8 of 8) sorted by relevance

/art/disassembler/
Ddisassembler_mips.cc665 int32_t df = (instruction >> 21) & 0x1; in Dump() local
666 switch (df) { in Dump()
674 int32_t df = (instruction >> 16) & 0x1; in Dump() local
675 switch (df) { in Dump()
683 int32_t df = (instruction >> 21) & 0x3; in Dump() local
684 switch (df) { in Dump()
694 int32_t df = (instruction >> 16) & 0x3; in Dump() local
695 switch (df) { in Dump()
729 int32_t df = instruction & 0x3; in Dump() local
732 switch (df) { in Dump()
[all …]
/art/compiler/utils/mips64/
Dassembler_mips64.cc188 int df, in EmitMsa3R() argument
198 df << kDfShift | in EmitMsa3R()
242 int df) { in EmitMsaMI10() argument
251 df; in EmitMsaMI10()
256 int df, in EmitMsaI10() argument
264 df << kDfShift | in EmitMsaI10()
272 int df, in EmitMsa2R() argument
280 df << kDf2RShift | in EmitMsa2R()
288 int df, in EmitMsa2RF() argument
296 df << kDf2RShift | in EmitMsa2RF()
Dassembler_mips64.h1665 int df,
1672 void EmitMsaMI10(int s10, GpuRegister rs, VectorRegister wd, int minor_opcode, int df);
1673 void EmitMsaI10(int operation, int df, int i10, VectorRegister wd, int minor_opcode);
1674 void EmitMsa2R(int operation, int df, VectorRegister ws, VectorRegister wd, int minor_opcode);
1675 void EmitMsa2RF(int operation, int df, VectorRegister ws, VectorRegister wd, int minor_opcode);
/art/compiler/utils/mips/
Dassembler_mips.h1694 int df,
1709 uint32_t EmitMsaMI10(int s10, Register rs, VectorRegister wd, int minor_opcode, int df);
1710 uint32_t EmitMsaI10(int operation, int df, int i10, VectorRegister wd, int minor_opcode);
1711 uint32_t EmitMsa2R(int operation, int df, VectorRegister ws, VectorRegister wd, int minor_opcode);
1713 int df,
Dassembler_mips.cc332 int df, in EmitMsa3R() argument
342 df << kDfShift | in EmitMsa3R()
389 int df) { in EmitMsaMI10() argument
398 df; in EmitMsaMI10()
404 int df, in EmitMsaI10() argument
412 df << kDfShift | in EmitMsaI10()
421 int df, in EmitMsa2R() argument
429 df << kDf2RShift | in EmitMsa2R()
438 int df, in EmitMsa2RF() argument
446 df << kDf2RShift | in EmitMsa2RF()
/art/test/dexdump/
Dcheckers.txt784 001bba: 5b90 0800 |00df: iput-object v0, v9, Lcom/google/android/check…
1694 0027b6: 28ba |01df: goto 0199 // -0046
2124 002cf6: 3901 0900 |00df: if-nez v1, 00e8 // +0009
2982 003782: 5408 1500 |01df: iget-object v8, v0, Lcom/google/android/check…
3493 003e7a: 28df |0033: goto 0012 // -0021
3888 004156: 1502 1000 |00df: const/high16 v2, #int 1048576 // #10
4153 004556: 1302 0001 |02df: const/16 v2, #int 256 // #100
4288 004756: 4b01 0004 |03df: aput v1, v0, v4
4715 004f46: 28f1 |01df: goto 01d0 // -000f
4993 005346: 5207 4100 |03df: iget v7, v0, Lcom/google/android/checkers/a;.…
[all …]
Dinvoke-custom.txt461 … 1a02 df00 |000a: const-string v2, "assertTrue value: " // string@00df
2633 …invoke/MethodType;.changeReturnType:(Ljava/lang/Class;)Ljava/lang/invoke/MethodType; // method@00df
3444 0031d6: 28df |0065: goto 0044 // -0021
3481 00326e: 28df |00b1: goto 0090 // -0021
3504 0032c6: 28df |00dd: goto 00bc // -0021
5256 003f26: 2826 |00b9: goto 00df // +0026
5274 003f72: 0e00 |00df: return-void
Dbytecodes.txt762 000e62: 3900 0b00 |00df: if-nez v0, 00ea // +000b