| /art/runtime/arch/mips/ |
| D | asm_support_mips.S | 73 .macro LDu feven,fodd,disp,base,temp
74 l.s \feven, \disp(\base)
75 lw \temp, \disp+4(\base)
81 .macro SDu feven,fodd,disp,base,temp
83 s.s \feven, \disp(\base)
84 sw \temp, \disp+4(\base)
99 .macro LDu feven,fodd,disp,base,temp
100 l.s \feven, \disp(\base)
101 l.s \fodd, \disp+4(\base)
104 .macro SDu feven,fodd,disp,base,temp
[all …]
|
| /art/dex2oat/linker/arm/ |
| D | relative_patcher_thumb2.cc | 117 uint32_t disp = target_offset - (patch_offset + kPcDisplacement); in PatchBakerReadBarrierBranch() local
118 DCHECK((disp >> 20) == 0u || (disp >> 20) == 0xfffu); // 21-bit signed. in PatchBakerReadBarrierBranch()
119 insn |= ((disp << (26 - 20)) & 0x04000000u) | // Shift bit 20 to 26, "S". in PatchBakerReadBarrierBranch()
120 ((disp >> (19 - 11)) & 0x00000800u) | // Shift bit 19 to 13, "J1". in PatchBakerReadBarrierBranch()
121 ((disp >> (18 - 13)) & 0x00002000u) | // Shift bit 18 to 11, "J2". in PatchBakerReadBarrierBranch()
122 ((disp << (16 - 12)) & 0x003f0000u) | // Shift bits 12-17 to 16-25, "imm6". in PatchBakerReadBarrierBranch()
123 ((disp >> (1 - 0)) & 0x000007ffu); // Shift bits 1-12 to 0-11, "imm11". in PatchBakerReadBarrierBranch()
|
| /art/compiler/utils/x86/ |
| D | assembler_x86.h | 109 void SetDisp8(int8_t disp) { in SetDisp8() argument
111 encoding_[length_++] = static_cast<uint8_t>(disp); in SetDisp8()
114 void SetDisp32(int32_t disp) { in SetDisp32() argument
116 int disp_size = sizeof(disp); in SetDisp32()
117 memmove(&encoding_[length_], &disp, disp_size); in SetDisp32()
152 Address(Register base_in, int32_t disp) { in Address() argument
153 Init(base_in, disp); in Address()
156 Address(Register base_in, int32_t disp, AssemblerFixup *fixup) { in Address() argument
157 Init(base_in, disp); in Address()
161 Address(Register base_in, Offset disp) { in Address() argument
[all …]
|
| /art/dex2oat/linker/arm64/ |
| D | relative_patcher_arm64.cc | 219 uint32_t disp = target_offset - ((patch_offset - literal_offset + pc_insn_offset) & ~0xfffu); in PatchPcRelativeReference() local
253 insn = PatchAdrp(insn, disp); in PatchPcRelativeReference()
304 uint32_t imm12 = (disp & 0xfffu) >> shift; in PatchPcRelativeReference()
322 uint32_t disp = target_offset - patch_offset; in PatchBakerReadBarrierBranch() local
323 DCHECK((disp >> 20) == 0u || (disp >> 20) == 4095u); // 21-bit signed. in PatchBakerReadBarrierBranch()
324 insn |= (disp << (5 - 2)) & 0x00ffffe0u; // Shift bits 2-20 to 5-23. in PatchBakerReadBarrierBranch()
346 uint32_t Arm64RelativePatcher::PatchAdrp(uint32_t adrp, uint32_t disp) { in PatchAdrp() argument
349 ((disp & 0x00003000u) << (29 - 12)) | in PatchAdrp()
351 ((disp & 0xffffc000u) >> (12 + 2 - 5)) | in PatchAdrp()
357 ((disp & 0x80000000u) >> (31 - 23)); in PatchAdrp()
|
| D | relative_patcher_arm64_test.cc | 268 uint32_t disp = target_offset - (adrp_offset & ~0xfffu); in GenNopsAndAdrpAndUse() local
270 DCHECK_ALIGNED(disp, 1u << 2); in GenNopsAndAdrpAndUse()
272 ((disp & 0xfffu) << (10 - 2)); // imm12 = ((disp & 0xfffu) >> 2) is at bit 10. in GenNopsAndAdrpAndUse()
275 (disp & 0xfffu) << 10; // imm12 = (disp & 0xfffu) is at bit 10. in GenNopsAndAdrpAndUse()
280 ((disp & 0x3000u) << (29 - 12)) | // immlo = ((disp & 0x3000u) >> 12) is at bit 29, in GenNopsAndAdrpAndUse()
281 ((disp & 0xffffc000) >> (14 - 5)) | // immhi = (disp >> 14) is at bit 5, in GenNopsAndAdrpAndUse()
283 ((disp & 0x80000000) >> (31 - 23)); // sign bit in immhi is at bit 23. in GenNopsAndAdrpAndUse()
870 [&](uint32_t adrp_offset, uint32_t disp) { in TEST_F() argument
873 /*sprel_disp_in_load_units=*/ disp >> 2, in TEST_F()
884 [&](uint32_t adrp_offset, uint32_t disp) { in TEST_F() argument
[all …]
|
| D | relative_patcher_arm64.h | 59 static uint32_t PatchAdrp(uint32_t adrp, uint32_t disp);
|
| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 151 void SetDisp8(int8_t disp) { in SetDisp8() argument
153 encoding_[length_++] = static_cast<uint8_t>(disp); in SetDisp8()
156 void SetDisp32(int32_t disp) { in SetDisp32() argument
158 int disp_size = sizeof(disp); in SetDisp32()
159 memmove(&encoding_[length_], &disp, disp_size); in SetDisp32()
188 Address(CpuRegister base_in, int32_t disp) { in Address() argument
189 Init(base_in, disp); in Address()
192 Address(CpuRegister base_in, Offset disp) { in Address() argument
193 Init(base_in, disp.Int32Value()); in Address()
196 Address(CpuRegister base_in, FrameOffset disp) { in Address() argument
[all …]
|