Searched refs:first_reg (Results 1 – 6 of 6) sorted by relevance
| /art/runtime/gc/space/ |
| D | region_space-inl.h | 415 Region* first_reg = ®ions_[left]; in AllocLargeInRange() local
416 DCHECK(first_reg->IsFree()); in AllocLargeInRange()
417 first_reg->UnfreeLarge(this, time_); in AllocLargeInRange()
426 first_reg->SetTop(first_reg->Begin() + allocated); in AllocLargeInRange()
429 first_reg->SetNewlyAllocated(); in AllocLargeInRange()
450 mirror::Object* large_region = reinterpret_cast<mirror::Object*>(first_reg->Begin()); in AllocLargeInRange()
|
| /art/libdexfile/dex/ |
| D | dex_instruction.cc | 429 uint16_t first_reg = VRegC_3rc(); in DumpString() local
439 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
447 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
455 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
461 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
|
| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 4272 CpuRegister first_reg = locations->InAt(0).AsRegister<CpuRegister>(); in HandleShift() local
4280 __ shll(first_reg, second_reg); in HandleShift()
4282 __ sarl(first_reg, second_reg); in HandleShift()
4284 __ shrl(first_reg, second_reg); in HandleShift()
4289 __ shll(first_reg, imm); in HandleShift()
4291 __ sarl(first_reg, imm); in HandleShift()
4293 __ shrl(first_reg, imm); in HandleShift()
4302 __ shlq(first_reg, second_reg); in HandleShift()
4304 __ sarq(first_reg, second_reg); in HandleShift()
4306 __ shrq(first_reg, second_reg); in HandleShift()
[all …]
|
| D | instruction_builder.h | 134 uint16_t first_reg,
|
| D | code_generator_arm_vixl.cc | 4842 vixl32::Register first_reg = InputRegisterAt(op, 0); in HandleShift() local
4848 __ Lsl(out_reg, first_reg, out_reg); in HandleShift()
4850 __ Asr(out_reg, first_reg, out_reg); in HandleShift()
4852 __ Lsr(out_reg, first_reg, out_reg); in HandleShift()
4858 __ Mov(out_reg, first_reg); in HandleShift()
4860 __ Lsl(out_reg, first_reg, shift_value); in HandleShift()
4862 __ Asr(out_reg, first_reg, shift_value); in HandleShift()
4864 __ Lsr(out_reg, first_reg, shift_value); in HandleShift()
7976 vixl32::Register first_reg = RegisterFrom(first); in VisitBitwiseNegatedRight() local
7982 __ Bic(out_reg, first_reg, second_reg); in VisitBitwiseNegatedRight()
[all …]
|
| D | code_generator_x86.cc | 4255 Register first_reg = first.AsRegister<Register>(); in HandleShift() local
4260 __ shll(first_reg, second_reg); in HandleShift()
4262 __ sarl(first_reg, second_reg); in HandleShift()
4264 __ shrl(first_reg, second_reg); in HandleShift()
4273 __ shll(first_reg, imm); in HandleShift()
4275 __ sarl(first_reg, imm); in HandleShift()
4277 __ shrl(first_reg, imm); in HandleShift()
4447 Register first_reg = first.AsRegister<Register>(); in VisitRor() local
4450 __ rorl(first_reg, second_reg); in VisitRor()
4453 __ rorl(first_reg, imm); in VisitRor()
|