| /art/compiler/utils/x86/ |
| D | managed_register_x86.cc | 43 Register high; member
48 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
69 Register high = AsRegisterPairHigh(); in Overlaps() local
71 X86ManagedRegister::FromCpuRegister(high).Overlaps(other); in Overlaps()
94 return kRegisterPairs[r].high; in AllocIdHigh()
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| /art/compiler/utils/x86_64/ |
| D | managed_register_x86_64.cc | 42 Register high; member
47 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
64 Register high = AsRegisterPairHigh().AsRegister(); in Overlaps() local
66 X86_64ManagedRegister::FromCpuRegister(high).Overlaps(other); in Overlaps()
89 return kRegisterPairs[r].high; in AllocIdHigh()
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| /art/compiler/utils/mips/ |
| D | managed_register_mips.cc | 31 Register high = AsRegisterPairHigh(); in Overlaps() local
33 MipsManagedRegister::FromCoreRegister(high).Overlaps(other); in Overlaps()
39 FRegister high = AsOverlappingDRegisterHigh(); in Overlaps() local
41 return (low == other_freg) || (high == other_freg); in Overlaps()
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| /art/compiler/utils/arm/ |
| D | managed_register_arm.cc | 30 Register high = AsRegisterPairHigh(); in Overlaps() local
32 ArmManagedRegister::FromCoreRegister(high).Overlaps(other); in Overlaps()
38 SRegister high = AsOverlappingDRegisterHigh(); in Overlaps() local
40 return (low == other_sreg) || (high == other_sreg); in Overlaps()
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| /art/compiler/utils/arm64/ |
| D | managed_register_arm64.cc | 79 int high = RegNo(); in RegIdHigh() local
81 high += kNumberOfXRegIds + kNumberOfWRegIds; in RegIdHigh()
83 return high; in RegIdHigh()
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| /art/compiler/optimizing/ |
| D | locations.h | 137 static Location RegisterPairLocation(int low, int high) { in RegisterPairLocation() argument
138 return Location(kRegisterPair, low << 16 | high); in RegisterPairLocation()
141 static Location FpuRegisterPairLocation(int low, int high) { in FpuRegisterPairLocation() argument
142 return Location(kFpuRegisterPair, low << 16 | high); in FpuRegisterPairLocation()
175 int high() const { in high() function
201 return static_cast<T>(high()); in AsRegisterPairHigh()
213 return static_cast<T>(high()); in AsFpuRegisterPairHigh()
233 return Location::RegisterLocation(high()); in ToHigh()
235 return Location::FpuRegisterLocation(high()); in ToHigh()
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| D | intrinsics.cc | 122 int32_t high = GetIntegerCacheField(cache_class, kHighFieldName); in CheckIntegerCache() local
123 if (boot_image_cache->GetLength() != high - low + 1) { in CheckIntegerCache()
184 int32_t high = GetIntegerCacheField(cache_class, kHighFieldName); in ComputeIntegerValueOfLocations() local
188 CHECK_EQ(current_cache->GetLength(), high - low + 1); in ComputeIntegerValueOfLocations()
200 static_cast<uint32_t>(high - low + 1)) { in ComputeIntegerValueOfLocations()
305 int32_t high = GetIntegerCacheField(cache_class, kHighFieldName); in ComputeIntegerValueOfInfo() local
306 info.length = dchecked_integral_cast<uint32_t>(high - info.low + 1); in ComputeIntegerValueOfInfo()
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| D | common_arm.h | 221 const vixl::aarch32::Register& high) { in LocationFrom() argument
222 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
226 const vixl::aarch32::SRegister& high) { in LocationFrom() argument
227 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
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| D | register_allocator_linear_scan.cc | 256 LiveInterval* high = interval->GetHighInterval(); in ProcessInstruction() local
257 temp_intervals_.push_back(high); in ProcessInstruction()
258 unhandled_fp_intervals_.push_back(high); in ProcessInstruction()
353 LiveInterval* high = current->GetHighInterval(); in ProcessInstruction() local
354 high->SetRegister(first.high()); in ProcessInstruction()
355 high->SetFrom(position + 1); in ProcessInstruction()
365 LiveInterval* high = current->GetHighInterval(); in ProcessInstruction() local
366 high->SetRegister(output.high()); in ProcessInstruction()
367 high->SetFrom(position + 1); in ProcessInstruction()
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| D | register_allocator.cc | 230 LiveInterval* high = interval->GetHighInterval()->SplitAt(position); in Split() local
231 new_interval->SetHighInterval(high); in Split()
232 high->SetLowInterval(new_interval); in Split()
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| D | locations.cc | 103 os << location.low() << ":" << location.high(); in operator <<()
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| D | code_generator.cc | 1344 int high = location.high(); in EmitEnvironment() local
1351 if (slow_path != nullptr && slow_path->IsFpuRegisterSaved(high)) { in EmitEnvironment()
1352 uint32_t offset = slow_path->GetStackOffsetOfFpuRegister(high); in EmitEnvironment()
1356 stack_map_stream->AddDexRegisterEntry(Kind::kInFpuRegister, high); in EmitEnvironment()
1365 int high = location.high(); in EmitEnvironment() local
1372 if (slow_path != nullptr && slow_path->IsCoreRegisterSaved(high)) { in EmitEnvironment()
1373 uint32_t offset = slow_path->GetStackOffsetOfCoreRegister(high); in EmitEnvironment()
1376 stack_map_stream->AddDexRegisterEntry(Kind::kInRegister, high); in EmitEnvironment()
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| D | parallel_move_resolver.cc | 94 return Location::RegisterLocation(location.high()); in HighOf()
96 return Location::FpuRegisterLocation(location.high()); in HighOf()
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| /art/test/568-checker-onebit/ |
| D | info.txt | 1 Unit test for 32-bit and 64-bit high/low-bit operations.
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| /art/test/543-env-long-ref/ |
| D | info.txt | 3 was overwriting the high dex register of a wide value.
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| /art/test/550-checker-regression-wide-store/ |
| D | info.txt | 1 Test an SsaBuilder regression where storing into the high vreg of a pair
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| /art/runtime/native/ |
| D | java_lang_StringFactory.cc | 34 jint high, jint offset, jint byte_count) { in StringFactory_newStringFromBytes() argument
54 high, in StringFactory_newStringFromBytes()
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| D | libcore_util_CharsetUtils.cc | 223 jchar high = static_cast<jchar>(ch); in CharsetUtils_toUtf8Bytes() local
225 if (!U16_IS_SURROGATE_LEAD(high) || !U16_IS_SURROGATE_TRAIL(low)) { in CharsetUtils_toUtf8Bytes()
233 ch = U16_GET_SUPPLEMENTARY(high, low); in CharsetUtils_toUtf8Bytes()
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| /art/runtime/interpreter/mterp/mips/ |
| D | other.S | 29 FETCH(a1, 2) # a1 <- BBBB (high)
78 FETCH(a2, 2) # a2 <- BBBB (high)
94 FETCH(a2, 3) # a2 <- hhhh (high middle)
96 FETCH(a3, 4) # a3 <- HHHH (high)
98 INSERT_HIGH_HALF(a2, a3) # a2 <- HHHHhhhh (high word)
116 FETCH_S(a2, 2) # a2 <- ssssBBBB (high)
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| /art/runtime/jdwp/ |
| D | jdwp_request.cc | 179 uint64_t high = Read4BE(); in Read8BE() local
181 return (high << 32) | low; in Read8BE()
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| /art/runtime/interpreter/mterp/arm/ |
| D | other.S | 30 FETCH r1, 2 @ r1<- BBBB (high)
81 FETCH r2, 2 @ r2<- BBBB (high)
98 FETCH r2, 3 @ r2<- hhhh (high middle)
100 FETCH r3, 4 @ r3<- HHHH (high)
102 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
126 FETCH_S r2, 2 @ r2<- ssssBBBB (high)
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| /art/test/550-checker-regression-wide-store/smali/ |
| D | TestCase.smali | 25 # Test storing into the high vreg of a wide pair. This scenario has runtime
53 # Test that storing a wide invalidates the value in the high vreg. This
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| /art/runtime/interpreter/mterp/mips64/ |
| D | other.S | 29 lh a1, 4(rPC) # a1 <- BBBB (high)
82 lh a4, 4(rPC) # a4 <- BBBB (high)
99 lh a2, 6(rPC) # a2 <- hhhh (high middle)
100 lh a3, 8(rPC) # a3 <- HHHH (high)
122 lh a1, 4(rPC) # a1 <- BBBB (high)
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| /art/tools/ahat/src/main/com/android/ahat/dominators/ |
| D | Dominators.java | 208 public boolean hasIdInRange(long low, long high) { in hasIdInRange() argument
210 if (low <= ids[i] && ids[i] <= high) { in hasIdInRange()
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| /art/runtime/entrypoints/quick/ |
| D | quick_alloc_entrypoints.cc | 102 mirror::ByteArray* byte_array, int32_t high, int32_t offset, int32_t byte_count, \
109 self, byte_count, handle_array, offset, high, allocator_type).Ptr(); \
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