Searched refs:min_reg (Results 1 – 5 of 5) sorted by relevance
425 ManagedRegister min_reg, in CreateHandleScopeEntry() argument428 X86ManagedRegister in_reg = min_reg.AsX86(); in CreateHandleScopeEntry()467 ManagedRegister min_reg) { in LoadReferenceFromHandleScope() argument469 X86ManagedRegister in_reg = min_reg.AsX86(); in LoadReferenceFromHandleScope()
476 ManagedRegister min_reg, in CreateHandleScopeEntry() argument479 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); in CreateHandleScopeEntry()524 ManagedRegister min_reg) { in LoadReferenceFromHandleScope() argument526 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); in LoadReferenceFromHandleScope()
484 ManagedRegister min_reg, in CreateHandleScopeEntry() argument488 min_reg.AsArm().IsNoRegister() ? vixl::aarch32::Register() : AsVIXLRegister(min_reg.AsArm()); in CreateHandleScopeEntry()559 ManagedRegister min_reg ATTRIBUTE_UNUSED) { in LoadReferenceFromHandleScope()
3954 ManagedRegister min_reg, in CreateHandleScopeEntry() argument3957 Mips64ManagedRegister in_reg = min_reg.AsMips64(); in CreateHandleScopeEntry()4005 ManagedRegister min_reg) { in LoadReferenceFromHandleScope() argument4007 Mips64ManagedRegister in_reg = min_reg.AsMips64(); in LoadReferenceFromHandleScope()
5119 ManagedRegister min_reg, in CreateHandleScopeEntry() argument5122 MipsManagedRegister in_reg = min_reg.AsMips(); in CreateHandleScopeEntry()5169 ManagedRegister min_reg) { in LoadReferenceFromHandleScope() argument5171 MipsManagedRegister in_reg = min_reg.AsMips(); in LoadReferenceFromHandleScope()