| /art/runtime/interpreter/mterp/x86/ |
| D | main.S | 193 movl rPC, OFF_FP_DEX_PC_PTR(rFP)
200 movl rSELF, rIBASE
201 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE
213 movl rSELF, rIBASE
214 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE
221 movl THREAD_CURRENT_IBASE_OFFSET(\_reg), rIBASE
278 movl VREG_ADDRESS(\_vreg), \_reg
287 movl \_reg, VREG_ADDRESS(\_vreg)
288 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
299 movl \_reg, VREG_ADDRESS(\_vreg)
[all …]
|
| D | other.S | 9 movl %eax, OUT_ARG0(%esp)
10 movl rINST, OUT_ARG1(%esp)
12 movl %eax, OUT_ARG2(%esp)
13 movl rSELF, %eax
14 movl %eax, OUT_ARG3(%esp)
29 movl 2(rPC), %eax # grab all 32 bits at once
42 movl $$0xf, rINST
70 movl 2(rPC), %eax # eax <- BBBB
71 movl %eax, OUT_ARG0(%esp)
72 movl rINST, OUT_ARG1(%esp)
[all …]
|
| D | invoke.S | 9 movl rSELF, %ecx
10 movl %ecx, OUT_ARG0(%esp)
12 movl %eax, OUT_ARG1(%esp)
13 movl rPC, OUT_ARG2(%esp)
15 movl rINST, OUT_ARG3(%esp)
20 movl rSELF, %eax
35 movl rSELF, %ecx
36 movl %ecx, OUT_ARG0(%esp)
38 movl %eax, OUT_ARG1(%esp)
39 movl rPC, OUT_ARG2(%esp)
[all …]
|
| D | control_flow.S | 80 movl 2(rPC), rINST # rINST <- AAAAAAAA
131 movl 2(rPC), %ecx # ecx <- BBBBbbbb
134 movl %eax, OUT_ARG1(%esp) # ARG1 <- vAA
135 movl %ecx, OUT_ARG0(%esp) # ARG0 <- switchData
139 movl %eax, rINST
151 movl rSELF, %eax
154 movl %eax, OUT_ARG0(%esp)
167 movl rSELF, %eax
170 movl %eax, OUT_ARG0(%esp)
178 movl rSELF, %eax
[all …]
|
| D | array.S | 42 movl %eax, OUT_ARG0(%esp)
43 movl %ecx, OUT_ARG1(%esp)
45 movl rSELF, %ecx
110 movl %eax, OUT_ARG0(%esp)
111 movl rPC, OUT_ARG1(%esp)
113 movl rINST, OUT_ARG2(%esp)
152 movl MIRROR_ARRAY_LENGTH_OFFSET(%ecx), rINST
159 movl 2(rPC), %ecx # ecx <- BBBBbbbb
162 movl %eax, OUT_ARG0(%esp)
163 movl %ecx, OUT_ARG1(%esp)
[all …]
|
| D | object.S | 7 movl rPC, OUT_ARG0(%esp) # arg0: Instruction* inst
8 movl rINST, OUT_ARG1(%esp) # arg1: uint16_t inst_data
10 movl %eax, OUT_ARG2(%esp) # arg2: ShadowFrame* sf
11 movl rSELF, %eax
12 movl %eax, OUT_ARG3(%esp) # arg3: Thread* self
26 movl %eax, OUT_ARG0(%esp)
28 movl %ecx, OUT_ARG1(%esp)
29 movl OFF_FP_METHOD(rFP),%eax
30 movl %eax, OUT_ARG2(%esp)
31 movl rSELF, %ecx
[all …]
|
| D | arithmetic.S | 14 movl %eax, %edx
26 movl $special, $result
39 movl %eax, %edx
71 movl $special, $result
103 movl $special, %eax
130 movl $special, %eax
240 movl rIBASE, LOCAL0(%esp) # save rIBASE
246 movl LOCAL0(%esp), rIBASE # restore rIBASE
295 movl $$0x80000000, %eax
323 movl $$0, VREG_ADDRESS(%ecx)
[all …]
|
| /art/runtime/arch/x86/ |
| D | quick_entrypoints_x86.S | 36 movl SYMBOL(_ZN3art7Runtime9instance_E)@GOT(REG_VAR(got_reg)), REG_VAR(temp_reg)
37 movl (REG_VAR(temp_reg)), REG_VAR(temp_reg)
42 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
62 movl SYMBOL(_ZN3art7Runtime9instance_E)@GOT(REG_VAR(got_reg)), REG_VAR(temp_reg)
63 movl (REG_VAR(temp_reg)), REG_VAR(temp_reg)
68 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
92 movl SYMBOL(_ZN3art7Runtime9instance_E)@GOT(REG_VAR(got_reg)), REG_VAR(temp_reg)
93 movl (REG_VAR(temp_reg)), REG_VAR(temp_reg)
98 movl %esp, %fs:THREAD_TOP_QUICK_FRAME_OFFSET
100 movl 12(%esp), REG_VAR(got_reg)
[all …]
|
| /art/compiler/utils/x86/ |
| D | jni_macro_assembler_x86.cc | 73 __ movl(Address(ESP, offset), spill.AsX86().AsCpuRegister()); in BuildFrame() local
129 __ movl(Address(ESP, offs), src.AsCpuRegister()); in Store() local
132 __ movl(Address(ESP, offs), src.AsRegisterPairLow()); in Store() local
133 __ movl(Address(ESP, FrameOffset(offs.Int32Value()+4)), src.AsRegisterPairHigh()); in Store() local
153 __ movl(Address(ESP, dest), src.AsCpuRegister()); in StoreRef() local
159 __ movl(Address(ESP, dest), src.AsCpuRegister()); in StoreRawPtr() local
163 __ movl(Address(ESP, dest), Immediate(imm)); in StoreImmediateToFrame() local
172 __ fs()->movl(Address::Absolute(thr_offs), scratch.AsCpuRegister()); in StoreStackOffsetToThread()
176 __ fs()->movl(Address::Absolute(thr_offs), ESP); in StoreStackPointerToThread()
192 __ movl(dest.AsCpuRegister(), Address(ESP, src)); in Load() local
[all …]
|
| D | assembler_x86.h | 330 void movl(Register dst, const Immediate& src);
331 void movl(Register dst, Register src);
333 void movl(Register dst, const Address& src);
334 void movl(const Address& dst, Register src);
335 void movl(const Address& dst, const Immediate& imm);
336 void movl(const Address& dst, Label* lbl);
|
| /art/runtime/interpreter/mterp/x86_64/ |
| D | main.S | 266 movl VREG_ADDRESS(\_vreg), \_reg
275 movl \_reg, VREG_ADDRESS(\_vreg)
276 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
287 movl \_reg, VREG_ADDRESS(\_vreg)
288 movl \_reg, VREG_REF_ADDRESS(\_vreg)
292 movl VREG_HIGH_ADDRESS(\_vreg), \_reg
296 movl \_reg, VREG_HIGH_ADDRESS(\_vreg)
297 movl MACRO_LITERAL(0), VREG_REF_HIGH_ADDRESS(\_vreg)
301 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
305 movl MACRO_LITERAL(0), VREG_REF_ADDRESS(\_vreg)
[all …]
|
| D | other.S | 25 movl 2(rPC), %eax # grab all 32 bits at once
38 movl $$0xf, rINST
66 movl 2(rPC), OUT_32_ARG0 # OUT_32_ARG0 <- BBBB
143 movl rINST, %eax # eax <- BA
170 movl THREAD_EXCEPTION_OFFSET(%rcx), %eax
172 movl $$0, THREAD_EXCEPTION_OFFSET(%rcx)
200 movl (%rax), %eax # r0 <- result.i.
221 movl rINST, %ecx # ecx <- BA
|
| D | arithmetic.S | 41 movl rINST, %ecx # rcx <- BA
78 movl rINST, %eax # rax <- 000000BA
176 movl rINST, %ecx # rcx <- A+
195 movl rINST, %eax # rax <- 000000BA
240 movl rINST, %ecx # rcx <- A+
255 movl rINST, %ecx # rcx <- A+
281 movl rINST, %ecx # ecx <- BA
302 movl rINST, %ecx # rcx <- A+
367 movl $$-1, %esi
420 movl rINST, %ecx # rcx <- A+
[all …]
|
| D | invoke.S | 13 movl rINST, OUT_32_ARG3
36 movl rINST, OUT_32_ARG3
|
| D | object.S | 8 movl rINST, OUT_32_ARG1 # arg1: uint16_t inst_data
113 movl rINST, %eax # eax <- BA
156 movl rINST, OUT_32_ARG2
|
| D | floating_point.S | 32 movl $$-1, %eax
42 movl rINST, %ecx # rcx <- A+
66 movl rINST, %ecx # ecx <- A+
|
| D | array.S | 118 movl rINST, %eax # eax <- BA
124 movl MIRROR_ARRAY_LENGTH_OFFSET(%rcx), rINST
|
| D | control_flow.S | 10 movl rINST, %ecx # rcx <- A+
|
| /art/runtime/arch/x86_64/ |
| D | quick_entrypoints_x86_64.S | 622 movl (%r11), REG_VAR(gpr_reg32)
678 movl %edx, %r10d
691 movl %r10d, %ecx // Place size of args in rcx.
700 movl (%r11), %esi // rsi := this pointer
772 movl %edx, %r10d
785 movl %r10d, %ecx // Place size of args in rcx.
962 movl %eax, %edi // pass the index of the constant as arg0
1051 movl MIRROR_CLASS_OBJECT_SIZE_ALLOC_FAST_PATH_OFFSET(%rdi), %eax
1076 movl %eax, (%rcx)
1092 movl %edi, MIRROR_OBJECT_CLASS_OFFSET(%rax)
[all …]
|
| /art/compiler/optimizing/ |
| D | code_generator_x86.cc | 126 __ movl(reg_, Immediate(0)); in EmitNativeCode() local
170 __ movl(length_loc.AsRegister<Register>(), array_len); in EmitNativeCode() local
250 __ movl(calling_convention.GetRegisterAt(0), Immediate(string_index.index_)); in EmitNativeCode() local
288 __ movl(calling_convention.GetRegisterAt(0), Immediate(type_index.index_)); in EmitNativeCode() local
582 __ movl(temp_, ref_reg); in EmitNativeCode() local
629 __ movl(EAX, temp_); in EmitNativeCode() local
643 __ movl(value, base); in EmitNativeCode() local
779 __ movl(free_reg, index_reg); in EmitNativeCode() local
835 __ movl(calling_convention.GetRegisterAt(2), Immediate(offset_)); in EmitNativeCode() local
975 __ movl(Address(ESP, stack_index), static_cast<Register>(reg_id)); in SaveCoreRegister() local
[all …]
|
| D | intrinsics_x86.cc | 127 __ movl(temp2, Address(src, temp1, ScaleFactor::TIMES_4, adjusted_offset)); in EmitNativeCode() local
130 __ movl(temp2, Address(src, temp2, ScaleFactor::TIMES_4, offset)); in EmitNativeCode() local
150 __ movl(Address(dest, temp1, ScaleFactor::TIMES_4, adjusted_offset), temp2); in EmitNativeCode() local
153 __ movl(Address(dest, temp3, ScaleFactor::TIMES_4, offset), temp2); in EmitNativeCode() local
317 __ movl(output_lo, input_hi); in VisitLongReverseBytes() local
318 __ movl(output_hi, input_lo); in VisitLongReverseBytes() local
500 __ movl(out, Immediate(kPrimIntMax)); in VisitMathRoundFloat() local
504 __ movl(out, Immediate(0)); // does not change flags in VisitMathRoundFloat() local
605 __ movl(out_lo, src_lo); in GenLowestOneBit() local
606 __ movl(out_hi, src_hi); in GenLowestOneBit() local
[all …]
|
| D | intrinsics_x86_64.cc | 102 __ movl(CpuRegister(TMP), Address(src_curr_addr, 0)); in EmitNativeCode() local
113 __ movl(Address(dst_curr_addr, 0), CpuRegister(TMP)); in EmitNativeCode() local
392 __ movl(out, Immediate(0)); // does not change flags in VisitMathRoundFloat() local
436 __ movl(out, Immediate(0)); // does not change flags, implicit zero extension to 64-bit in VisitMathRoundDouble() local
689 __ movl(temp, Address(input, length_offset)); in CheckPosition() local
717 __ movl(temp, Address(input, length_offset)); in CheckPosition() local
776 __ movl(count, Immediate(length.GetConstant()->AsIntConstant()->GetValue())); in VisitSystemArrayCopyChar() local
778 __ movl(count, length.AsRegister<CpuRegister>()); in VisitSystemArrayCopyChar() local
996 __ movl(temp1, Address(dest, class_offset)); in VisitSystemArrayCopy() local
998 __ movl(temp2, Address(src, class_offset)); in VisitSystemArrayCopy() local
[all …]
|
| D | code_generator_x86_64.cc | 216 __ movl(length_loc.AsRegister<CpuRegister>(), array_len); in EmitNativeCode() local
270 __ movl(CpuRegister(RAX), Immediate(type_index.index_)); in EmitNativeCode() local
317 __ movl(CpuRegister(RAX), Immediate(string_index.index_)); in EmitNativeCode() local
600 __ movl(temp1_, ref_cpu_reg); in EmitNativeCode() local
648 __ movl(CpuRegister(RAX), temp1_); in EmitNativeCode() local
663 __ movl(CpuRegister(value_reg), base); in EmitNativeCode() local
800 __ movl(CpuRegister(free_reg), CpuRegister(index_reg)); in EmitNativeCode() local
853 __ movl(CpuRegister(calling_convention.GetRegisterAt(2)), Immediate(offset_)); in EmitNativeCode() local
1009 __ movl(temp.AsRegister<CpuRegister>(), in GenerateStaticOrDirectCall() local
1060 __ movl(temp, Address(CpuRegister(receiver), class_offset)); in GenerateVirtualCall() local
[all …]
|
| /art/test/521-regression-integer-field-set/ |
| D | info.txt | 3 a `movw` instruction instead of a `movl` instruction.
|
| /art/compiler/utils/x86_64/ |
| D | jni_macro_assembler_x86_64.cc | 85 __ movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame() local
161 __ movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister()); in Store() local
190 __ movl(Address(CpuRegister(RSP), dest), src.AsCpuRegister()); in StoreRef() local
202 __ movl(Address(CpuRegister(RSP), dest), Immediate(imm)); // TODO(64) movq? in StoreImmediateToFrame() local
232 __ movl(dest.AsCpuRegister(), Address(CpuRegister(RSP), src)); in Load() local
267 __ gs()->movl(dest.AsCpuRegister(), Address::Absolute(src, true)); in LoadFromThread()
302 __ movl(dest.AsCpuRegister(), Address(base.AsCpuRegister(), offs)); in LoadRef() local
375 __ movl(scratch.AsCpuRegister(), Address(CpuRegister(RSP), src)); in CopyRef() local
376 __ movl(Address(CpuRegister(RSP), dest), scratch.AsCpuRegister()); in CopyRef() local
484 __ movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry() local
[all …]
|