Searched refs:ARM_GIC_ICCPMR (Results 1 – 4 of 4) sorted by relevance
39 CachedPriorityMask = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR); in ArmGicV2SetupNonSecure()42 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0); in ArmGicV2SetupNonSecure()68 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, CachedPriorityMask); in ArmGicV2SetupNonSecure()78 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF); in ArmGicV2EnableInterruptInterface()
41 MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0); in ArmGicV2DisableInterruptInterface()
305 MmioWrite32 (mGicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0xff); in GicV2DxeInitialize()
72 #define ARM_GIC_ICCPMR 0x04 // Interrupt Priority Mask Register macro