Searched refs:ARM_GIC_ICDDCR (Results 1 – 5 of 5) sorted by relevance
33 MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1); in ArmGicEnableDistributor()35 if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) { in ArmGicEnableDistributor()36 MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2); in ArmGicEnableDistributor()38 MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1); in ArmGicEnableDistributor()
52 MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1); in ArmGicEnableDistributor()
293 MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0); in ArmGicDisableDistributor()
257 MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE); in GicV3DxeInitialize()299 if ((MmioRead32 (mGicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_DS) != 0) { in GicV3DxeInitialize()
23 #define ARM_GIC_ICDDCR 0x000 // Distributor Control Register macro