Searched refs:After (Results 1 – 25 of 56) sorted by relevance
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| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/BdsDxe/ |
| D | BdsDxe.uni | 5 // gEfiBdsArchProtocolGuid. After DxeCore finish dispatching, DxeCore will invoke Entry
22 …, this module will produce architecture protocol gEfiBdsArchProtocolGuid. After DxeCore finishes d…
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| D | BdsDxe.inf | 5 # gEfiBdsArchProtocolGuid. After DxeCore finish dispatching, DxeCore will invoke Entry
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| /device/linaro/bootloader/edk2/MdeModulePkg/Core/Dxe/Dispatcher/ |
| D | Dependency.c | 186 DriverEntry->After = TRUE; in CorePreProcessDepex()
189 if (DriverEntry->Before || DriverEntry->After) { in CorePreProcessDepex()
226 if (DriverEntry->After || DriverEntry->Before) { in CoreIsSchedulable()
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| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Universal/BdsDxe/ |
| D | BdsDxe.uni | 5 // gEfiBdsArchProtocolGuid. After DxeCore finish dispatching, DxeCore will invoke Entry
32 …, this module will produce architecture protocol gEfiBdsArchProtocolGuid. After DxeCore finishes d…
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| /device/linaro/bootloader/edk2/IntelFspPkg/Library/SecFspSecPlatformLibNull/Ia32/ |
| D | Flat32.s | 41 # After enabling protected mode, a far jump is executed to
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| D | Flat32.asm | 48 ; After enabling protected mode, a far jump is executed to
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| /device/linaro/bootloader/OpenPlatformPkg/Documentation/Marvell/Drivers/ |
| D | I2cDriver.txt | 61 about attached devices should be provided through PCDs. After EFI_I2C_DEVICE
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| D | EepromDriver.txt | 93 6. Open EFI_I2C_IO_PROTOCOL for usage in Start(). After that, QueueRequest
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| /device/linaro/bootloader/edk2/BaseTools/ |
| D | ReadMe.txt | 21 After this, you can run the toolsetup.bat file, which is in the same
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| D | BuildEnv | 155 echo "After downloading, either create a symbolic link to the source at"
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| /device/linaro/hikey/installer/hikey960/ |
| D | README | 29 After that completes, power the board off, and set the switches back
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| /device/sample/sdk_addon/ |
| D | manifest.ini | 41 # of USB Vendor IDs it knows. After installing an add-on the command
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| /device/linaro/bootloader/edk2/MdeModulePkg/Core/PiSmmCore/ |
| D | Dependency.c | 188 if (DriverEntry->After || DriverEntry->Before) { in SmmIsSchedulable()
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| D | Dispatcher.c | 741 DriverEntry->After = TRUE; in SmmPreProcessDepex()
744 if (DriverEntry->Before || DriverEntry->After) { in SmmPreProcessDepex()
1065 if (DriverEntry->After && DriverEntry->Dependent && DriverEntry != InsertedDriverEntry) { in SmmInsertOnScheduledQueueWhileProcessingBeforeAndAfter()
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| D | PiSmmCore.h | 92 BOOLEAN After; member
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/ |
| D | SecEntry.asm | 55 ; After enabling protected mode, a far jump is executed to
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/ |
| D | PlatformPei.inf | 31 # After that MRC wrapper calls MRC to initialize memory and install a PPI
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| /device/google/contexthub/firmware/os/platform/stm32/lkr/ |
| D | app.lkr | 33 …After this image is produced a nonoapp_postprocess unitily will process relocs and symbols and com…
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/ |
| D | Flat32.asm | 78 ; After enabling protected mode, a far jump is executed to
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| D | PlatformEarlyInit.inf | 12 # After that MRC wrapper calls MRC to initialize memory and install a PPI
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| /device/linaro/bootloader/edk2/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/ |
| D | SecEntry.S | 47 # After enabling protected mode, a far jump is executed to
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| D | SecEntry.asm | 56 ; After enabling protected mode, a far jump is executed to
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| /device/linaro/bootloader/edk2/DuetPkg/ |
| D | ReadMe.txt | 66 …After post build action, you should check the size of EfiLdr at $WORKSPACE/Build/DuetPkgIA32(DuetP…
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| /device/linaro/bootloader/arm-trusted-firmware/docs/plat/ |
| D | nvidia-tegra.rst | 28 dedicated, 128MB main-memory-based optimization cache. After being read
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| D | socionext-uniphier.rst | 41 This runs in the on-chip SRAM. After the minimum SoC initialization and DRAM
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