Searched refs:B3_RI_RTO_XS1 (Results 1 – 2 of 2) sorted by relevance
516 #define B3_RI_RTO_XS1 0x0195 /* 8 bit RD Timeout Queue XS1 (TO5) */ macro
1027 CSR_WRITE_1 (sc, SELECT_RAM_BUFFER (i, B3_RI_RTO_XS1), MSK_RI_TO_53); in mskc_reset()