Searched refs:BIST (Results 1 – 25 of 28) sorted by relevance
12
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformSecLib/ |
D | PlatformSecLib.c | 154 UINT32 *BIST; in SecPlatformInformation() local 168 BIST = GET_GUID_HOB_DATA (GuidHob); in SecPlatformInformation() 178 BIST = (UINT32 *) ((UINT32) TopOfStack - sizeof (UINT32) - Size); in SecPlatformInformation() 185 BIST, in SecPlatformInformation() 190 BIST = GET_GUID_HOB_DATA (GuidHob); in SecPlatformInformation() 199 CopyMem (PlatformInformationRecord, BIST, Size); in SecPlatformInformation()
|
/device/linaro/bootloader/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia16/ |
D | Init16.asm | 36 ; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test) 37 ; @param[out] ESP Initial value of the EAX register (BIST: Built-in Self Test) 41 ; ESP - Initial value of the EAX register (BIST: Built-in Self Test)
|
/device/linaro/bootloader/edk2/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/ |
D | PeiCoreEntry.S | 69 # Push processor count to stack first, then BIST status (AP then BSP) 88 # We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
|
D | PeiCoreEntry.asm | 76 ; Push processor count to stack first, then BIST status (AP then BSP) 95 ; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
|
D | AsmSaveSecContext.S | 24 # MM0 = BIST State
|
D | AsmSaveSecContext.asm | 29 ; MM0 = BIST State
|
D | SecEntry.S | 53 # MM0 = BIST State 64 # Store the BIST value in mm0
|
D | SecEntry.asm | 62 ; MM0 = BIST State 72 ; Store the BIST value in mm0
|
/device/linaro/bootloader/edk2/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/ |
D | PeiCoreEntry.nasm | 74 ; Push processor count to stack first, then BIST status (AP then BSP) 93 ; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
|
D | SecEntry.nasm | 56 ; MM0 = BIST State 68 ; Store the BIST value in mm0 130 ; Initializes stack with some early data (BIST, PEI entry, etc)
|
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/ |
D | PeiCoreEntry.asm | 77 ; Push processor count to stack first, then BIST status (AP then BSP) 96 ; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST
|
D | SecEntry.asm | 61 ; MM0 = BIST State 71 ; Store the BIST value in mm0
|
D | AsmSaveSecContext.asm | 30 ; MM0 = BIST State
|
/device/linaro/bootloader/edk2/OvmfPkg/Sec/Ia32/ |
D | SecEntry.nasm | 29 ; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
|
/device/linaro/bootloader/edk2/OvmfPkg/Sec/X64/ |
D | SecEntry.nasm | 30 ; @param[in] RAX Initial value of the EAX register (BIST: Built-in Self Test)
|
/device/linaro/bootloader/edk2/UefiCpuPkg/ResetVector/Vtf0/ |
D | ReadMe.txt | 25 EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)
|
D | Main.asm | 23 ; (BIST: Built-in Self Test)
|
/device/linaro/bootloader/edk2/CorebootModulePkg/SecCore/Ia32/ |
D | SecEntry.asm | 40 ; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
|
D | SecEntry.S | 33 # @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
|
D | SecEntry.nasm | 31 ; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
|
/device/linaro/bootloader/edk2/UefiCpuPkg/Library/MpInitLib/X64/ |
D | MpFuncs.nasm | 39 ; Save BIST information to ebp firstly 42 mov ebp, eax ; Save BIST information 199 push rbp ; Push BIST data at top of AP stack
|
/device/linaro/bootloader/edk2/UefiCpuPkg/Library/MpInitLib/Ia32/ |
D | MpFuncs.nasm | 38 mov ebp, eax ; save BIST information 195 push ebp ; push BIST data at top of AP stack
|
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/ |
D | pci22.h | 49 UINT8 BIST; member
|
/device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/ |
D | pci22.h | 42 UINT8 BIST; member
|
/device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
D | Pci22.h | 45 UINT8 BIST; member
|
12