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Searched refs:BIT_31 (Results 1 – 1 of 1) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_mskreg.h166 #define BIT_31 ((UINT32)1 << 31) macro
268 #define PCI_Y2_PIG_ENA BIT_31 /* Enable Plug-in-Go (YUKON-2) */
317 #define PCI_OS_PCI64B BIT_31 /* Conventional PCI 64 bits Bus */
347 #define PCI_CTL_DIV_CORE_CLK_ENA BIT_31 /* Divide Core Clock Enable */
829 #define Y2_IS_HW_ERR BIT_31 /* Interrupt HW Error */
990 #define GLB_GPIO_CLK_DEB_ENA BIT_31 /* Clock Debug Enable */
1002 #define I2C_FLAG BIT_31 /* Start read/write if WR */
1042 #define PEX_RD_ACCESS BIT_31 /* Access Mode Read = 1, Write = 0 */
1089 #define BMU_IDLE BIT_31 /* BMU Idle State */
1121 #define F_TX_CHK_AUTO_OFF BIT_31 /* Tx checksum auto-calc Off(Yukon EX)*/
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