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Searched refs:BIT_8 (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_mskreg.h189 #define BIT_8 (1 << 8) macro
292 #define PCI_DIS_PCI_CLK BIT_8 /* Disable PCI clock driving */
306 #define PCI_PATCH_DIR_0 BIT_8
368 #define PCI_GAT_INT_FIFO_EMPTY BIT_8 /* Internal FIFO Empty */
391 #define PCI_CF1_ENA_CFG_LDR_DONE BIT_8 /* Enable core level Config loader done */
400 #define PEX_DC_EN_EXT_TAG BIT_8 /* Enable Extended Tag Field */
796 #define Y2_LED_STAT_OFF BIT_8 /* Status LED Off (YUKON-2 only) */
840 #define Y2_IS_CHK_TXA2 BIT_8 /* Descriptor error TXA 2 */
873 #define Y2_IS_TCP_TXA2 BIT_8 /* TCP length mismatch async Tx queue IRQ */
1051 #define RI_CLR_WR_PERR BIT_8 /* Clear IRQ RAM Write Parity Err */
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/device/linaro/bootloader/edk2/OptionRomPkg/UndiRuntimeDxe/
DE100b.h209 #define BIT_8 0x0100 macro
286 #define MDI_CR_FULL_HALF BIT_8 // FDX =1, half duplex =0
314 #define NWAY_AD_TX_FULL_DPX BIT_8 // TX full duplex capable
342 #define PHY_100_ER0_FORCE_FAIL BIT_8 // Force Fail is enabled
360 #define NSC_TX_CONG_ENABLE BIT_8 // Enables congestion control