| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
| D | VlvCommonDefinitions.h | 118 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \ argument
120 (UINTN)(Bus << 20) + \
130 #define MmPci64Ptr( Segment, Bus, Device, Function, Register ) \ argument
131 ( (volatile UINT64 *)MmPciAddress( Segment, Bus, Device, Function, Register ) )
133 #define MmPci64( Segment, Bus, Device, Function, Register ) \ argument
134 *MmPci64Ptr( Segment, Bus, Device, Function, Register )
136 #define MmPci64Or( Segment, Bus, Device, Function, Register, OrData ) \ argument
137 MmPci64( Segment, Bus, Device, Function, Register ) = \
139 MmPci64( Segment, Bus, Device, Function, Register ) | \
143 #define MmPci64And( Segment, Bus, Device, Function, Register, AndData ) \ argument
[all …]
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/ |
| D | PchCommonDefinitions.h | 96 #define PchPciDeviceMmBase(Bus, Device, Function) \ argument
98 … (UINTN) PCH_PCI_EXPRESS_BASE_ADDRESS + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) \
105 #define PchPciDeviceMmAddress(Segment, Bus, Device, Function, Register) \ argument
107 … (UINTN) PCH_PCI_EXPRESS_BASE_ADDRESS + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) \
114 #define PchMmPci32Ptr(Segment, Bus, Device, Function, Register) \ argument
115 ((volatile UINT32 *) PchPciDeviceMmAddress (Segment, Bus, Device, Function, Register))
117 #define PchMmPci32(Segment, Bus, Device, Function, Register) *PchMmPci32Ptr (Segment, Bus, Device,… argument
119 #define PchMmPci32Or(Segment, Bus, Device, Function, Register, OrData) \ argument
122 Bus, \
126 ) = (UINT32) (PchMmPci32 (Segment, Bus, Device, Function, Register) | (UINT32) (OrData))
[all …]
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
| D | QNCCommonDefinitions.h | 244 #define QNCMmPciAddress( Segment, Bus, Device, Function, Register ) \ argument
246 (UINTN)(Bus << 20) + \
255 #define PciDeviceMmBase( Bus, Device, Function) \ argument
257 (UINTN)(Bus << 20) + \
265 #define QNCMmPci32Ptr( Segment, Bus, Device, Function, Register ) \ argument
266 ( (volatile UINT32 *)QNCMmPciAddress( Segment, Bus, Device, Function, Register ) )
268 #define QNCMmPci32( Segment, Bus, Device, Function, Register ) \ argument
269 *QNCMmPci32Ptr( Segment, Bus, Device, Function, Register )
271 #define QNCMmPci32Or( Segment, Bus, Device, Function, Register, OrData ) \ argument
272 QNCMmPci32( Segment, Bus, Device, Function, Register ) = \
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/ |
| D | IohCommonDefinitions.h | 246 #define IohMmPciAddress( Segment, Bus, Device, Function, Register ) \ argument
248 (UINTN)(Bus << 20) + \
257 #define IohMmPci32Ptr( Segment, Bus, Device, Function, Register ) \ argument
258 ( (volatile UINT32 *)IohMmPciAddress( Segment, Bus, Device, Function, Register ) )
260 #define IohMmPci32( Segment, Bus, Device, Function, Register ) \ argument
261 *IohMmPci32Ptr( Segment, Bus, Device, Function, Register )
263 #define IohMmPci32Or( Segment, Bus, Device, Function, Register, OrData ) \ argument
264 IohMmPci32( Segment, Bus, Device, Function, Register ) = \
266 IohMmPci32( Segment, Bus, Device, Function, Register ) | \
270 #define IohMmPci32And( Segment, Bus, Device, Function, Register, AndData ) \ argument
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1616/D05AcpiTables/ |
| D | D05Mcfg.aslc | 60 0x80, //Start Bus Number
61 0x87, //End Bus Number
68 0x88, //Start Bus Number
69 0x8f, //End Bus Number
76 0x0, //Start Bus Number
77 0x7, //End Bus Number
84 0xc0, //Start Bus Number
85 0xc7, //End Bus Number
92 0x90, //Start Bus Number
93 0x97, //End Bus Number
[all …]
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/ |
| D | SdMmcPciHcPei.c | 85 UINT16 Bus; in InitializeSdMmcHcPeim() local
127 for (Bus = 0; Bus < 256; Bus++) { in InitializeSdMmcHcPeim()
130 SubClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0A)); in InitializeSdMmcHcPeim()
131 BaseClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0B)); in InitializeSdMmcHcPeim()
137 SlotInfo = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, SD_MMC_HC_PEI_SLOT_OFFSET)); in InitializeSdMmcHcPeim()
146 …PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_B… in InitializeSdMmcHcPeim()
147 …PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot), 0xFFFF… in InitializeSdMmcHcPeim()
148 … Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4 * Slot)); in InitializeSdMmcHcPeim()
162 … PciWrite32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF); in InitializeSdMmcHcPeim()
163 … Size = PciRead32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4)); in InitializeSdMmcHcPeim()
[all …]
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UfsPciHcPei/ |
| D | UfsPciHcPei.c | 81 UINT16 Bus; in InitializeUfsHcPeim() local
115 for (Bus = 0; Bus < 256; Bus++) { in InitializeUfsHcPeim()
118 SubClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0A)); in InitializeUfsHcPeim()
119 BaseClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0B)); in InitializeUfsHcPeim()
125 …PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_B… in InitializeUfsHcPeim()
126 … PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), 0xFFFFFFFF); in InitializeUfsHcPeim()
127 Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET)); in InitializeUfsHcPeim()
132 …PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), (UINT32)(PcdGet32… in InitializeUfsHcPeim()
133 …PciOr16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (EFI_PCI_COMMAND_BUS_MASTER … in InitializeUfsHcPeim()
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/Ia32/ |
| D | PlatformIoLib.c | 31 UINT8 Bus, in GetPciAddress() argument
54 Data |= (((UINT32) Bus) << 16); in GetPciAddress()
65 UINT8 Bus, in PciRead8() argument
90 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead8()
111 UINT8 Bus, in PciRead16() argument
136 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead16()
157 UINT8 Bus, in PciRead32() argument
182 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead32()
203 UINT8 Bus, in PciWrite8() argument
229 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciWrite8()
[all …]
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/X64/ |
| D | PlatformIoLib.c | 31 UINT8 Bus, in GetPciAddress() argument
56 Data |= (((UINT32) Bus) << 16); in GetPciAddress()
67 UINT8 Bus, in PciRead8() argument
92 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead8()
113 UINT8 Bus, in PciRead16() argument
138 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead16()
159 UINT8 Bus, in PciRead32() argument
184 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciRead32()
205 UINT8 Bus, in PciWrite8() argument
231 PciAddress = GetPciAddress (Segment, Bus, DevFunc, Register); in PciWrite8()
[all …]
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Usb/UsbBusDxe/ |
| D | UsbEnumer.c | 62 UsbCloseHostProtoByChild (UsbIf->Device->Bus, UsbIf->Handle); in UsbFreeInterface()
159 Status = UsbOpenHostProtoByChild (Device->Bus, UsbIf->Handle); in UsbCreateInterface()
231 Device->Bus = ParentIf->Device->Bus; in UsbCreateDevice()
281 if (UsbBusIsWantedUsbIO (UsbIf->Device->Bus, UsbIf)) { in UsbConnectDriver()
553 USB_BUS *Bus; in UsbRemoveDevice() local
559 Bus = Device->Bus; in UsbRemoveDevice()
566 for (Index = 1; Index < Bus->MaxDevices; Index++) { in UsbRemoveDevice()
567 Child = Bus->Devices[Index]; in UsbRemoveDevice()
576 Bus->Devices[Index] = NULL; in UsbRemoveDevice()
578 Bus->Devices[Index]->DisconnectFail = TRUE; in UsbRemoveDevice()
[all …]
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/ |
| D | D05Pci.asl | 49 Name(_BBN, 0x80) // Base Bus Number
53 WordBusNumber ( // Bus numbers assigned to this root
56 0x80, // AddressMinimum - Minimum Bus Number
57 0x87, // AddressMaximum - Maximum Bus Number
109 Name(_BBN, 0x88) // Base Bus Number
113 WordBusNumber ( // Bus numbers assigned to this root
116 0x88, // AddressMinimum - Minimum Bus Number
117 0x8f, // AddressMaximum - Maximum Bus Number
182 Name(_BBN, 0x0) // Base Bus Number
186 WordBusNumber ( // Bus numbers assigned to this root
[all …]
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/ |
| D | D03Mcfg.aslc | 60 0x0, //Start Bus Number
61 0x1f, //End Bus Number
67 0xe0, //Start Bus Number
68 0xff, //End Bus Number
74 0x80, //Start Bus Number
75 0x9f, //End Bus Number
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| /device/linaro/bootloader/edk2/DuetPkg/ |
| D | DuetPkg.fdf | 82 INF IntelFrameworkModulePkg/Bus/Pci/VgaMiniPortDxe/VgaMiniPortDxe.inf
87 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
88 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
89 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
90 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
93 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
94 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
95 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
96 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
97 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
[all …]
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| /device/linaro/bootloader/edk2/MdeModulePkg/ |
| D | MdeModulePkg.dsc | 228 MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
229 MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
230 MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
231 MdeModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupportDxe.inf
232 MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
233 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf
234 MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.inf
235 MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.inf
236 MdeModulePkg/Bus/Sd/SdBlockIoPei/SdBlockIoPei.inf
237 MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
[all …]
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Dsdt/ |
| D | QuarkSouthCluster.asi | 19 Device (SDIO) // SDIO [Bus 0, Device 20, Function 0]
26 Device (URT0) // UART0 [Bus 0, Device 20, Function 1]
33 Device (USBD) // USB Device [Bus 0, Device 20, Function 2]
40 Device (EHCI) // EHCI [Bus 0, Device 20, Function 3]
47 Device (OHCI) // OHCI [Bus 0, Device 20, Function 4]
54 Device (URT1) // UART1 [Bus 0, Device 20, Function 5]
61 Device (ENT0) // Ethernet0 [Bus 0, Device 20, Function 6]
68 Device (ENT1) // Ethernet1 [Bus 0, Device 20, Function 7]
75 Device (SPI0) // SPI0 [Bus 0, Device 21, Function 0]
82 Device (SPI1) // SPI1 [Bus 0, Device 21, Function 1]
[all …]
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ |
| D | PciRomTable.c | 23 UINT8 Bus; member
50 IN UINT8 Bus, in PciRomAddImageMapping() argument
80 mRomImageTable[mNumberOfPciRomImages].Bus = Bus; in PciRomAddImageMapping()
111 mRomImageTable[Index].Bus == PciIoDevice->BusNumber && in PciRomGetImageMapping()
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| D | PciEnumeratorSupport.h | 35 IN UINT8 Bus,
77 IN UINT8 Bus,
99 IN UINT8 Bus,
120 IN UINT8 Bus,
141 IN UINT8 Bus,
380 IN UINT8 Bus,
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| /device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/ |
| D | PcatIo.c | 153 Pci.Bits.Bus = PciAddress.Bus; in PcatRootBridgeIoPciRW()
189 (PciAddress.Bus << 20) | in PcatRootBridgeIoPciRW()
227 UINT16 Bus; in ScanPciBus() local
236 for (Bus = MinBus; Bus <= MaxBus; Bus++) { in ScanPciBus()
249 Address = EFI_PCI_ADDRESS (Bus, Device, Func, 0); in ScanPciBus()
282 Bus, in ScanPciBus()
310 UINT16 Bus, in CheckForRom() argument
333 Address = EFI_PCI_ADDRESS (Bus, Device, Func, 0); in CheckForRom()
508 TempPciOptionRomDescriptors->Bus = (UINT8)Bus; in CheckForRom()
543 UINT16 Bus, in SaveCommandRegister() argument
[all …]
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| /device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/ |
| D | PcatIo.c | 153 Pci.Bits.Bus = PciAddress.Bus; in PcatRootBridgeIoPciRW()
189 (PciAddress.Bus << 20) | in PcatRootBridgeIoPciRW()
227 UINT16 Bus; in ScanPciBus() local
236 for (Bus = MinBus; Bus <= MaxBus; Bus++) { in ScanPciBus()
249 Address = EFI_PCI_ADDRESS (Bus, Device, Func, 0); in ScanPciBus()
282 Bus, in ScanPciBus()
310 UINT16 Bus, in CheckForRom() argument
333 Address = EFI_PCI_ADDRESS (Bus, Device, Func, 0); in CheckForRom()
508 TempPciOptionRomDescriptors->Bus = (UINT8)Bus; in CheckForRom()
543 UINT16 Bus, in SaveCommandRegister() argument
[all …]
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSmm/ |
| D | S3Save.c | 267 PciAddress.Bus = 0;
279 PciAddress.Bus,
305 PciAddress.Bus = RegTable[Index++];
313 PciAddress.Bus,
334 …Data32 = MmioRead32 (MmPciAddress (0, PciAddress.Bus, PciAddress.Device, PciAddress.Function, PciA…
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/ |
| D | D03Pci.asl | 28 Name(_BBN, 0) // Base Bus Number
32 WordBusNumber ( // Bus numbers assigned to this root
35 0x0, // AddressMinimum - Minimum Bus Number
36 0x1f, // AddressMaximum - Maximum Bus Number
107 Name(_BBN, 0xe0) // Base Bus Number
111 WordBusNumber ( // Bus numbers assigned to this root
114 0xe0, // AddressMinimum - Minimum Bus Number
115 0xff, // AddressMaximum - Maximum Bus Number
187 Name(_BBN, 0x80) // Base Bus Number
191 WordBusNumber ( // Bus numbers assigned to this root
[all …]
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| /device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/ |
| D | PciRomTable.c | 29 UINT8 Bus; member
44 IN UINT8 Bus, in PciRomAddImageMapping() argument
73 mRomImageTable[mNumberOfPciRomImages].Bus = Bus; in PciRomAddImageMapping()
143 HexToString (&FileName[24], PciOptionRomDescriptor->Bus, 2); in PciRomLoadEfiDriversFromRomImage()
267 PciOptionRomDescriptor->Bus, in PciRomLoadEfiDriversFromRomImage()
333 if ((MinBus <= PciOptionRomDescriptor->Bus) && (PciOptionRomDescriptor->Bus <= MaxBus)) { in PciRomLoadEfiDriversFromOptionRomTable()
373 PciOptionRomDescriptor->Bus == PciIoDevice->BusNumber && in PciRomGetRomResourceFromPciOptionRomTable()
384 mRomImageTable[Index].Bus == PciIoDevice->BusNumber && in PciRomGetRomResourceFromPciOptionRomTable()
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/IntelQNCLib/ |
| D | PciExpress.c | 54 UINT8 Bus, in PcieFindCapId() argument
65 CapHeader = QNCMmPci8 (0, Bus, Device, Function, R_QNC_PCIE_CAP_PTR); in PcieFindCapId()
72 if (QNCMmPci8 (0, Bus, Device, Function, CapHeader) == CapId) { in PcieFindCapId()
75 CapHeader = QNCMmPci8 (0, Bus, Device, Function, CapHeader + 1); in PcieFindCapId()
99 UINT8 Bus, in PcieFindExtendedCapId() argument
114 CapHeaderId = QNCMmPci16 (0, Bus, Device, Function, CapHeaderOffset); in PcieFindExtendedCapId()
118 CapHeaderOffset = (QNCMmPci16 (0, Bus, Device, Function, CapHeaderOffset + 2) >> 4); in PcieFindExtendedCapId()
328 IN UINT8 Bus, in PcieSetClkreq() argument
343 CapOffset = PcieFindCapId (Bus, Device, Function, PCIE_CAPID); in PcieSetClkreq()
351 if ((QNCMmPci32 (0, Bus, Device, Function, (CapOffset + PCIE_LINK_CAP_OFFSET)) in PcieSetClkreq()
[all …]
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/ |
| D | EfiRegTableLib.h | 81 #define PCI_WRITE(Bus, Dev, Fnc, Reg, Width, Data, S3Flag) \ argument
84 (UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
96 #define PCI_READ_MODIFY_WRITE(Bus, Dev, Fnc, Reg, Width, OrMask, AndMask, S3Flag) \ argument
99 (UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Library/ |
| D | EfiRegTableLib.h | 90 #define PCI_WRITE(Bus, Dev, Fnc, Reg, Width, Data, S3Flag) \
93 (UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
111 #define PCI_READ_MODIFY_WRITE(Bus, Dev, Fnc, Reg, Width, OrMask, AndMask, S3Flag) \
114 (UINT32) (EFI_PCI_ADDRESS ((Bus), (Dev), (Fnc), (Reg))), \
|