Searched refs:CM_CLKSEL_PLL_DIV (Results 1 – 2 of 2) sorted by relevance
28 MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13)); in ClockInit()
71 #define CM_CLKSEL_PLL_DIV(x) ((((x) - 1) & 0x7F) << 0) macro