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Searched refs:CSR_WRITE_1 (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_msk.c344 CSR_WRITE_1 (sc, MR_ADDR (port, GMAC_IRQ_MSK), GM_IS_TX_FF_UR | GM_IS_RX_FF_OR); in msk_miibus_statchg()
738 CSR_WRITE_1 (sc, B0_POWER_CTRL, PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); in msk_phy_power()
753 CSR_WRITE_1 (sc, B2_Y2_CLK_GATE, val); in msk_phy_power()
826 CSR_WRITE_1 (sc, B2_Y2_CLK_GATE, val); in msk_phy_power()
827 CSR_WRITE_1 (sc, B0_POWER_CTRL, PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF); in msk_phy_power()
857 CSR_WRITE_1 (sc, B2_TST_CTRL1, TST_CFG_WRITE_ON); in clear_pci_errors()
899 CSR_WRITE_1 (sc, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); in mskc_reset()
996 CSR_WRITE_1 (sc, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in mskc_reset()
1008 CSR_WRITE_1 (sc, B2_TI_CTRL, TIM_STOP); in mskc_reset()
1009 CSR_WRITE_1 (sc, B2_TI_CTRL, TIM_CLR_IRQ); in mskc_reset()
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Dif_mskreg.h2068 #define CSR_WRITE_1(sc, reg, val) MmioWrite8 ((sc)->RegBase + (reg), (val)) macro