Searched refs:CTX_SPSR_EL3 (Results 1 – 9 of 9) sorted by relevance
| /device/linaro/bootloader/arm-trusted-firmware/services/spd/trusty/ |
| D | trusty.c | 153 ctx->fiq_cpsr = SMC_GET_EL3(handle, CTX_SPSR_EL3); in trusty_fiq_handler()
174 ctx->fiq_handler_cpsr = SMC_GET_EL3(handle, CTX_SPSR_EL3); in trusty_set_fiq_handler()
293 CTX_SPSR_EL3)); in trusty_init()
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| /device/linaro/bootloader/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
| D | context_mgmt.c | 201 write_ctx_reg(state, CTX_SPSR_EL3, ep->spsr); in cm_init_context_common()
502 write_ctx_reg(state, CTX_SPSR_EL3, spsr); in cm_set_elr_spsr_el3()
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| D | context.S | 411 ldp x16, x17, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_fiq_glue.c | 56 fiq_state[cpu].spsr_el3 = read_ctx_reg((el3state_ctx), (uint32_t)(CTX_SPSR_EL3)); in tegra_fiq_interrupt_handler()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/ |
| D | execution_state_switch.c | 56 spsr = read_ctx_reg(el3_ctx, CTX_SPSR_EL3); in arm_execution_state_switch()
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| /device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/ |
| D | runtime_exceptions.S | 72 stp x0, x1, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
356 stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
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| /device/linaro/bootloader/arm-trusted-firmware/services/spd/tspd/ |
| D | tspd_main.c | 127 CTX_SPSR_EL3); in tspd_sel1_interrupt_handler()
326 CTX_SPSR_EL3, in tspd_smc_handler()
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| /device/linaro/bootloader/arm-trusted-firmware/bl1/aarch64/ |
| D | bl1_exceptions.S | 260 stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
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| /device/linaro/bootloader/arm-trusted-firmware/include/lib/el3_runtime/aarch64/ |
| D | context.h | 57 #define CTX_SPSR_EL3 U(0x10) macro
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