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Searched refs:DDR_SEC_BASE (Results 1 – 4 of 4) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_def.h32 #define DDR_SEC_BASE 0x3F000000 macro
35 #define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_def.h36 #define DDR_SEC_BASE (DDR_BASE + DDR_SIZE - DDR_SEC_SIZE) /* 0x3F000000 */ macro
39 #define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/include/
Dplatform_def.h75 #define BL32_DRAM_BASE DDR_SEC_BASE
76 #define BL32_DRAM_LIMIT (DDR_SEC_BASE+DDR_SEC_SIZE)
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/include/
Dplatform_def.h113 #define BL32_DRAM_BASE DDR_SEC_BASE
114 #define BL32_DRAM_LIMIT (DDR_SEC_BASE+DDR_SEC_SIZE)