Searched refs:GPIO_BASE_ADDRESS (Results 1 – 8 of 8) sorted by relevance
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/ |
| D | BoardGpios.c | 420 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_USE_SEL, PlatformCfioDataPtr->Use_Sel_SC0); in MultiPlatformGpioProgram()
425 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_LVL , PlatformCfioDataPtr->GP_Lvl_SC0); in MultiPlatformGpioProgram()
430 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_IO_SEL, PlatformCfioDataPtr->Io_Sel_SC0); in MultiPlatformGpioProgram()
435 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_TPE, PlatformCfioDataPtr->TPE_SC0); in MultiPlatformGpioProgram()
440 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_TNE, PlatformCfioDataPtr->TNE_SC0); in MultiPlatformGpioProgram()
445 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_TS, PlatformCfioDataPtr->TS_SC0); in MultiPlatformGpioProgram()
450 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_USE_SEL2, PlatformCfioDataPtr->Use_Sel_SC1); in MultiPlatformGpioProgram()
455 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_LVL2, PlatformCfioDataPtr->GP_Lvl_SC1); in MultiPlatformGpioProgram()
460 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_IO_SEL2, PlatformCfioDataPtr->Io_Sel_SC1); in MultiPlatformGpioProgram()
465 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_USE_SEL3, PlatformCfioDataPtr->Use_Sel_SC2); in MultiPlatformGpioProgram()
[all …]
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
| D | PlatformBaseAddresses.h | 56 #define GPIO_BASE_ADDRESS 0x0500 macro
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/ |
| D | BoardId.c | 162 Data8 = IoRead8(GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_LVL2);
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSmm/ |
| D | Platform.c | 628 Data32 = IoRead32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_LVL); in S4S5CallBack()
630 IoWrite32(GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_LVL, Data32); in S4S5CallBack()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformInitPei/ |
| D | PlatformEarlyInit.c | 392 IoWrite32 (GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_USE_SEL, in MeasuredBootInit()
393 (IoRead32(GPIO_BASE_ADDRESS + R_PCH_GPIO_SC_USE_SEL) & (UINT32)~BIT0)); in MeasuredBootInit()
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| D | PchInitPeim.c | 661 PchPlatformPolicyPpi->GpioBase = GPIO_BASE_ADDRESS;
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/ |
| D | Platform.asl | 616 Offset(0x28), // cfio_ioreg_SC_GP_LVL_63_32_ - [GPIO_BASE_ADDRESS] + 28h
619 Offset(0x48), // cfio_ioreg_SC_GP_LVL_95_64_ - [GPIO_BASE_ADDRESS] + 48h
691 Offset(0x88), // cfio_ioreg_SUS_GP_LVL_31_0_ - [GPIO_BASE_ADDRESS] + 88h
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/ |
| D | Platform.c | 571 (UINT16)((GPIO_BASE_ADDRESS & B_PCH_LPC_GPIO_BASE_BAR) | B_PCH_LPC_GPIO_BASE_EN)
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