Searched refs:MPIDR (Results 1 – 17 of 17) sorted by relevance
| /device/linaro/bootloader/arm-trusted-firmware/docs/ |
| D | psci-pd-tree.rst | 25 tree. It also uses an MPIDR to find a node in the tree. The assumption that
27 code is not scalable. The use of an MPIDR also restricts the number of
46 using an MPIDR. There is no requirement to perform state coordination while
138 corresponding to the MPIDR. It will return an error (-1) if an MPIDR is passed
140 platform API have changed since it is required to validate the passed MPIDR. It
145 the index since there is no need to validate the MPIDR of the calling core.
155 Dealing with holes in MPIDR allocation
159 core power domains, for example, Juno and FVPs, the logic to convert an MPIDR to
171 #. Implement more complex logic to convert a valid MPIDR to a core index while
181 allow use of a simpler logic to convert an MPIDR to a core index.
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| D | platform-migration-guide.rst | 18 - Removing the framework assumption about the structure of the MPIDR, and
47 This removes the assumption in the PSCI implementation that MPIDR
74 to implement a static mapping between ``MPIDR`` and core index or implement
239 Also, some platform APIs which took ``MPIDR`` as an argument were only ever
321 is identified by its ``MPIDR``, which is passed as the argument. The function is
344 This function identifies a core by its ``MPIDR``, which is passed as the argument,
360 A platform may need to convert the ``MPIDR`` of a core to an absolute number, which
370 cpu_id = 8-bit value in MPIDR at affinity level 0
371 cluster_id = 8-bit value in MPIDR at affinity level 1
382 has been allocated for the core specified by MPIDR. For BL images that only
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| D | platform-interrupt-controller-API.rst | 213 the ID of the SGI. The second parameter, ``target``, must be the MPIDR of the
239 - ``INTR_ROUTING_MODE_PE`` means the interrupt is routed to the PE whose MPIDR
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| D | porting-guide.rst | 810 This function validates the ``MPIDR`` of a CPU and converts it to an index,
812 case the ``MPIDR`` is invalid, this function returns -1. This function will only
1929 CPU is specified by its ``MPIDR`` in a PSCI ``CPU_ON`` call. The ``pwr_domain_on()``
2086 by the ``MPIDR`` (first argument). The generic code expects the platform to
2272 domain. The target power domain is identified by using both ``MPIDR`` (first
2291 the power state of a node (identified by the first parameter, the ``MPIDR``) in
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| D | user-guide.rst | 234 cater for the multi-threading ``MT`` bit when accessing MPIDR. When this flag
235 is set, the functions which deal with MPIDR assume that the ``MT`` bit in
236 MPIDR is set and access the bit-fields in MPIDR accordingly. Default value of
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| D | change-log.rst | 179 accessing MPIDR assume that the `MT` bit is set for the platform and
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| D | firmware-design.rst | 2433 ``PMF_GET_TIMESTAMP_BY_INDEX()`` macros. These macros accept the CPU's MPIDR
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/aarch32/ |
| D | fvp_helpers.S | 54 ldcopr r2, MPIDR
98 ldcopr r0, MPIDR
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/aarch32/ |
| D | arm_helpers.S | 22 ldcopr r0, MPIDR
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/ |
| D | Madt.c | 223 GicC->MPIDR = MpId; in BuildGicC()
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| /device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/ |
| D | arch_helpers.h | 228 DEFINE_COPROCR_READ_FUNC(mpidr, MPIDR)
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| D | arch.h | 389 #define MPIDR p15, 0, c0, c0, 5 macro
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| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/Arm/ |
| D | ArmV7Support.asm | 278 mrc p15, 0, r0, c0, c0, 5 ; read MPIDR
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| D | ArmV7Support.S | 285 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
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| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| D | Acpi51.h | 513 UINT64 MPIDR; member
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| D | Acpi61.h | 514 UINT64 MPIDR; member
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| D | Acpi60.h | 514 UINT64 MPIDR; member
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