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Searched refs:MR_ADDR (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_msk.c344 CSR_WRITE_1 (sc, MR_ADDR (port, GMAC_IRQ_MSK), GM_IS_TX_FF_UR | GM_IS_RX_FF_OR); in msk_miibus_statchg()
386 CSR_WRITE_4 (sc, MR_ADDR (port, GMAC_CTRL), gmac); in msk_miibus_statchg()
502 CSR_WRITE_4 (sc_if->msk_softc, MR_ADDR (sc_if->msk_md.port, RX_GMF_CTRL_T), RX_VLAN_STRIP_OFF); in msk_setvlan()
503 CSR_WRITE_4 (sc_if->msk_softc, MR_ADDR (sc_if->msk_md.port, TX_GMF_CTRL_T), TX_VLAN_TAG_OFF); in msk_setvlan()
800 CSR_WRITE_2 (sc, MR_ADDR (i, GMAC_LINK_CTRL), GMLC_RST_SET); in msk_phy_power()
801 CSR_WRITE_2 (sc, MR_ADDR (i, GMAC_LINK_CTRL), GMLC_RST_CLR); in msk_phy_power()
978 CSR_WRITE_4 (sc, MR_ADDR (i, GPHY_CTRL), GPC_RST_SET); in mskc_reset()
979 CSR_WRITE_4 (sc, MR_ADDR (i, GPHY_CTRL), GPC_RST_CLR); in mskc_reset()
982 CSR_WRITE_4 (sc, MR_ADDR (i, GPHY_CTRL), 0x00105226); in mskc_reset()
985 CSR_WRITE_4 (sc, MR_ADDR (i, GMAC_CTRL), GMC_RST_SET); in mskc_reset()
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Dif_mskreg.h539 #define MR_ADDR(Mac, Offs) (((Mac) << 7) + (Offs)) macro