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1 /*++
2 
3 Copyright (c) 2004, Intel Corporation. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution.  The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8 
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 
12 Module Name:
13 
14   PalApi.h
15 
16 Abstract:
17 
18   Main PAL API's defined in PAL specification.
19 
20 
21 Revision History:
22 
23 --*/
24 
25 #ifndef _PALPROC_H
26 #define _PALPROC_H
27 
28 #include "Tiano.h"
29 
30 #define PAL_CACHE_FLUSH       0x0001
31 #define PAL_CACHE_INFO        0x0002
32 #define PAL_CACHE_INIT        0x0003
33 #define PAL_CACHE_SUMMARY     0x0004
34 #define PAL_MEM_ATTRIB        0x0005
35 #define PAL_PTCE_INFO         0x0006
36 #define PAL_VM_INFO           0x0007
37 #define PAL_VM_SUMMARY        0x0008
38 #define PAL_BUS_GET_FEATURES  0x0009
39 #define PAL_BUS_SET_FEATURES  0x000a
40 #define PAL_DEBUG_INFO        0x000b
41 #define PAL_FIXED_ADDR        0x000c
42 #define PAL_FREQ_BASE         0x000d
43 #define PAL_FREQ_RATIOS       0x000e
44 #define PAL_PERF_MON_INFO     0x000f
45 #define PAL_PLATFORM_ADDR     0x0010
46 #define PAL_PROC_GET_FEATURES 0x0011
47 #define PAL_PROC_SET_FEATURES 0x0012
48 #define PAL_RSE_INFO          0x0013
49 #define PAL_VERSION           0x0014
50 
51 #define PAL_MC_CLEAR_LOG      0x0015
52 #define PAL_MC_DRAIN          0x0016
53 #define PAL_MC_EXPECTED       0x0017
54 #define PAL_MC_DYNAMIC_STATE  0x0018
55 #define PAL_MC_ERROR_INFO     0x0019
56 #define PAL_MC_RESUME         0x001a
57 #define PAL_MC_REGISTER_MEM   0x001b
58 #define PAL_HALT              0x001c
59 #define PAL_HALT_LIGHT        0x001d
60 #define PAL_COPY_INFO         0x001e
61 #define PAL_SHUTDOWN          0x002c
62 #define PAL_AUTH              0x0209
63 #define PAL_SINGL_DISPERSAL   0x0226  // dec. 550
64 #define PAL_HALT_INFO         0x0101
65 #define PAL_CACHE_LINE_INIT   0x001f
66 #define PAL_PMI_ENTRYPOINT    0x0020
67 #define PAL_ENTER_IA_32_ENV   0x0021
68 #define PAL_VM_PAGE_SIZE      0x0022
69 #define PAL_MEM_FOR_TEST      0x0025
70 #define PAL_CACHE_PROT_INFO   0x0026
71 
72 #define PAL_COPY_PAL          0x0100
73 #define PAL_CACHE_READ        0x0103
74 #define PAL_CACHE_WRITE       0x0104
75 #define PAL_TEST_PROC         0x0102
76 
77 #define PAL_DEBUG_FEATURE     0x0063  // vp1
78 typedef UINT64  EFI_PAL_STATUS;
79 
80 //
81 //  Return values from PAL
82 //
83 typedef struct {
84   EFI_PAL_STATUS  Status; // register r8
85   UINT64          r9;
86   UINT64          r10;
87   UINT64          r11;
88 } PAL_RETURN_REGS;
89 
90 //
91 // PAL equates for other parameters.
92 //
93 #define PAL_SUCCESS             0x0
94 #define PAL_CALL_ERROR          0xfffffffffffffffd
95 #define PAL_CALL_UNIMPLEMENTED  0xffffffffffffffff
96 #define PAL_CACHE_TYPE_I        0x1
97 #define PAL_CACHE_TYPE_D        0x2
98 #define PAL_CACHE_TYPE_I_AND_D  0x3
99 #define PAL_CACHE_NO_INT        0x0
100 #define PAL_CACHE_INT           0x2
101 //
102 // #define PAL_CACHE_PLAT_ACK                              0x4
103 //
104 #define PAL_CACHE_NO_PLAT_ACK               0x0
105 #define PAL_CACHE_INVALIDATE                0x1
106 #define PAL_CACHE_NO_INVALIDATE             0x0
107 #define PAL_CACHE_ALL_LEVELS                - 0x1
108 
109 #define PAL_FEATURE_ENABLE                  0x1
110 #define PAL_ENABLE_BERR_BIT                 63
111 #define PAL_ENABLE_MCA_BINIT_BIT            61
112 #define PAL_ENABLE_CMCI_MCA_BIT             60
113 #define PAL_CACHE_DISABLE_BIT               59
114 #define PAL_DISABLE_COHERENCY_BIT           58
115 
116 #define PAL_DIS_BUS_DATA_ERR_CHECK_BIT      63
117 #define PAL_DIS_BUS_ADDR_ERR_CHECK_BIT      61
118 #define PAL_DIS_BUS_INIT_EVENT_SIGNAL_BIT   60
119 #define PAL_DIS_BUS_REQ_ERR_SIGNAL_BIT      58
120 #define PAL_DIS_BUS_REQ_INT_ERR_SIGNAL_BIT  57
121 #define PAL_DIS_BUS_REQ_ERR_CHECK_BIT       56
122 #define PAL_DIS_BUS_RESP_ERR_CHECK_BIT      55
123 
124 #define PAL_COPY_BSP_TOKEN                  0x0
125 #define PAL_COPY_AP_TOKEN                   0x1
126 
127 #define PAL_CODE_TOKEN                      0x0
128 #define PAL_IA32EMU_CODE_TOKEN              0x1
129 
130 #define PAL_INTERRUPT_BLOCK_TOKEN           0x0
131 #define PAL_IO_BLOCK_TOKEN                  0x1
132 
133 #endif
134