Searched refs:PMC (Results 1 – 9 of 9) sorted by relevance
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/ |
| D | token.asl | 27 Name(PFDR, 0xfed03034) // PMC Function Disable Register
28 Name(PMCB, 0xfed03000) // PMC Base Address
29 Name(PCLK, 0xfed03060) // PMC Clock Control Register
|
| D | PCI_DRC.ASL | 49 // PMC BAR. Check if the hard code meets the real configuration.
52 Memory32Fixed(ReadWrite,0x0FED03000,0x01000,PMCB) // PMC BAR
|
| D | Pch.asl | 52 // Define a Memory Region that will allow access to the PMC
53 // Register Block. Note that in the Intel Reference Solution, the PMC
56 OperationRegion(PMCR, SystemMemory, \PFDR, 0x04)// PMC Function Disable Register
94 OperationRegion(CLKC, SystemMemory, \PCLK, 0x18)// PMC CLK CTL Registers
|
| /device/google/contexthub/firmware/os/platform/stm32/ |
| D | syscfg.c | 25 volatile uint32_t PMC; member
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSetupDxe/ |
| D | FwVersionStrings.uni | 44 #string STR_PMC_FW_STRING #language en-US "PMC FW Patch"
|
| D | VfrStrings.uni | 1200 …S0ix. In Auto mode, PMC will assert SLP_S0IX_N ONLY for PR1.4 and beyond, RVP plus Rohm B3 or Dial…
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/ |
| D | pci22.h | 450 UINT16 PMC; member
|
| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/ |
| D | pci22.h | 435 UINT16 PMC; member
|
| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| D | Pci22.h | 711 EFI_PCI_PMC PMC; member
|