| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/ |
| D | pmu.c | 30 regs_updata_bit_set(PMU_BASE + PMU_SFT_CON, pmu_sft_l2flsh_clst_b); in rk3368_flash_l2_b()
33 while (!(mmio_read_32(PMU_BASE + PMU_CORE_PWR_ST) in rk3368_flash_l2_b()
38 mmio_read_32(PMU_BASE + PMU_CORE_PWR_ST)); in rk3368_flash_l2_b()
41 regs_updata_bit_clr(PMU_BASE + PMU_SFT_CON, pmu_sft_l2flsh_clst_b); in rk3368_flash_l2_b()
143 val = mmio_read_32(PMU_BASE + PMU_BUS_IDE_REQ); in rk3368_pmu_bus_idle()
149 mmio_write_32(PMU_BASE + PMU_BUS_IDE_REQ, val); in rk3368_pmu_bus_idle()
151 while ((mmio_read_32(PMU_BASE + in rk3368_pmu_bus_idle()
156 mmio_read_32(PMU_BASE + PMU_BUS_IDE_ST), in rk3368_pmu_bus_idle()
165 regs_updata_bit_clr(PMU_BASE + PMU_SFT_CON, pmu_sft_acinactm_clst_b); in pmu_scu_b_pwrup()
173 if ((mmio_read_32(PMU_BASE + PMU_PWRDN_ST) & in pmu_scu_b_pwrdn()
[all …]
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/ |
| D | pmu.c | 77 mmio_clrsetbits_32(PMU_BASE + PMU_BUS_IDLE_REQ, bus_id, bus_req); in pmu_bus_idle_req()
80 bus_state = mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ST) & bus_id; in pmu_bus_idle_req()
81 bus_ack = mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ACK) & bus_id; in pmu_bus_idle_req()
88 mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ST), in pmu_bus_idle_req()
91 mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ACK), in pmu_bus_idle_req()
324 pmu_powerdomain_state = mmio_read_32(PMU_BASE + PMU_PWRDN_ST); in pmu_power_domains_suspend()
397 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, BIT(L2_FLUSH_REQ_CLUSTER_B)); in rk3399_flush_l2_b()
404 while (!(mmio_read_32(PMU_BASE + PMU_CORE_PWR_ST) & in rk3399_flush_l2_b()
412 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, BIT(L2_FLUSH_REQ_CLUSTER_B)); in rk3399_flush_l2_b()
419 if ((mmio_read_32(PMU_BASE + PMU_PWRDN_ST) & in pmu_scu_b_pwrdn()
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| D | plat_pmu_macros.S | 90 mov x5, PMU_BASE
117 mov x5, PMU_BASE
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/ |
| D | dram.c | 21 mmio_setbits_32(PMU_BASE + PMU_BUS_IDLE_REQ, in idle_port()
23 while ((mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ST) & in idle_port()
31 mmio_clrbits_32(PMU_BASE + PMU_BUS_IDLE_REQ, in deidle_port()
33 while (mmio_read_32(PMU_BASE + PMU_BUS_IDLE_ST) & in deidle_port()
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| D | suspend.c | 19 status_value = mmio_read_32(PMU_BASE + PMU_POWER_ST); in handle_suspend()
21 mmio_clrbits_32(PMU_BASE + PMU_PWRMODE_CON, 0x01); in handle_suspend()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/ |
| D | pmu_com.h | 11 #define CHECK_CPU_WFIE_BASE (PMU_BASE + PMU_CORE_PWR_ST)
40 uint32_t pwrdn_st = mmio_read_32(PMU_BASE + PMU_PWRDN_ST) & BIT(pd); in pmu_power_domain_st()
56 val = mmio_read_32(PMU_BASE + PMU_PWRDN_CON); in pmu_power_domain_ctr()
62 mmio_write_32(PMU_BASE + PMU_PWRDN_CON, val); in pmu_power_domain_ctr()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/ |
| D | pmu.c | 37 pd_reg = mmio_read_32(PMU_BASE + PMU_PWRDN_CON) & BIT(cpu_id); in get_cpus_pwr_domain_cfg_info()
38 apm_reg = mmio_read_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id)) & in get_cpus_pwr_domain_cfg_info()
60 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
65 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
76 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
95 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_off()
103 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_off()
176 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), CORES_PM_DISABLE); in rockchip_soc_cores_pwr_dm_on_finish()
185 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), CORES_PM_DISABLE); in rockchip_soc_cores_pwr_dm_resume()
506 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, BIT(0)); in ddr_suspend()
[all …]
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/ |
| D | rk3368_def.h | 31 #define PMU_BASE 0xff730000 macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/ |
| D | rk3328_def.h | 21 #define PMU_BASE 0xff140000 macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/ |
| D | addressmap_shared.h | 26 #define PMU_BASE (MMIO_BASE + 0x07310000) macro
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/ |
| D | soc.c | 22 MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/ |
| D | soc.c | 29 MAP_REGION_FLAT(PMU_BASE, PMU_SIZE,
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/ |
| D | suspend.c | 587 mmio_setbits_32(PMU_BASE + PMU_PWRMODE_CON, (1 << 19)); in pctl_start()
589 mmio_setbits_32(PMU_BASE + PMU_PWRMODE_CON, (1 << 23)); in pctl_start()
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| D | dfs.c | 1752 low_power |= ((mmio_read_32(PMU_BASE + PMU_SFT_CON) >> tmp) & in exit_low_power()
1754 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, 1 << tmp); in exit_low_power()
1755 while (!(mmio_read_32(PMU_BASE + PMU_DDR_SREF_ST) & (1 << i))) in exit_low_power()
1788 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, val << tmp); in resume_low_power()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/ |
| D | ddr_rk3368.c | 425 p_ddr_reg->retendisaddr = PMU_BASE + PMU_PWRMD_COM; in ddr_reg_save()
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