Searched refs:Q_ADDR (Results 1 – 2 of 2) sorted by relevance
/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/ |
D | if_msk.c | 2158 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_rxq, Q_CSR), BMU_CLR_IRQ_PAR); in msk_handle_hwerr() 2163 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_txq, Q_CSR), BMU_CLR_IRQ_TCP); in msk_handle_hwerr() 2575 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_txq, Q_CSR), BMU_CLR_RESET); in msk_init() 2576 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_txq, Q_CSR), BMU_OPER_INIT); in msk_init() 2577 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_txq, Q_CSR), BMU_FIFO_OP_ON); in msk_init() 2578 CSR_WRITE_2 (sc, Q_ADDR (sc_if->msk_txq, Q_WM), MSK_BMU_TX_WM); in msk_init() 2583 CSR_WRITE_2 (sc, Q_ADDR (sc_if->msk_txq, Q_AL), MSK_ECU_TXFF_LEV); in msk_init() 2592 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_txq, Q_F), F_TX_CHK_AUTO_OFF); in msk_init() 2598 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_rxq, Q_CSR), BMU_CLR_RESET); in msk_init() 2599 CSR_WRITE_4 (sc, Q_ADDR (sc_if->msk_rxq, Q_CSR), BMU_OPER_INIT); in msk_init() [all …]
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D | if_mskreg.h | 582 #define Q_ADDR(Queue, Offs) (B8_Q_REGS + (Queue) + (Offs)) macro
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