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Searched refs:RB_CTRL (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_msk.c2572 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_txsq, RB_CTRL), RB_RST_SET); in msk_init()
2674 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_rxq, RB_CTRL), RB_RST_CLR); in msk_set_rambuffer()
2689 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_rxq, RB_CTRL), RB_ENA_OP_MD); in msk_set_rambuffer()
2690 CSR_READ_1 (sc, RB_ADDR (sc_if->msk_rxq, RB_CTRL)); in msk_set_rambuffer()
2693 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_txq, RB_CTRL), RB_RST_CLR); in msk_set_rambuffer()
2700 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_txq, RB_CTRL), RB_ENA_STFWD); in msk_set_rambuffer()
2701 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_txq, RB_CTRL), RB_ENA_OP_MD); in msk_set_rambuffer()
2702 CSR_READ_1 (sc, RB_ADDR (sc_if->msk_txq, RB_CTRL)); in msk_set_rambuffer()
2787 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_txq, RB_CTRL), RB_RST_SET | RB_DIS_OP_MD); in mskc_stop_if()
2804 CSR_WRITE_1 (sc, RB_ADDR (sc_if->msk_txq, RB_CTRL), RB_RST_SET); in mskc_stop_if()
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Dif_mskreg.h619 #define RB_CTRL 0x28 /* 8 bit RAM Buffer Control Register */ macro