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Searched refs:RI_CLR_WR_PERR (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_mskreg.h1051 #define RI_CLR_WR_PERR BIT_8 /* Clear IRQ RAM Write Parity Err */ macro
Dif_msk.c2148 CSR_WRITE_2 (sc, SELECT_RAM_BUFFER (sc_if->msk_md.port, B3_RI_CTRL), RI_CLR_WR_PERR); in msk_handle_hwerr()