Searched refs:SPD_SDRAM_TCLK2_PULSE (Results 1 – 2 of 2) sorted by relevance
45 #define SPD_SDRAM_TCLK2_PULSE 23 // cycle time for 2nd highest cas latency macro
41 #define SPD_SDRAM_TCLK2_PULSE 23 ///< cycle time for 2nd highest cas latency macro