Searched refs:TCR_TG0_4KB (Results 1 – 2 of 2) sorted by relevance
110 #define TCR_TG0_4KB (0UL << 14) macro
583 TCR = T0SZ | (1UL << 31) | (1UL << 23) | TCR_TG0_4KB; in ArmConfigureMmu()605 TCR = T0SZ | TCR_TG0_4KB | TCR_TG1_4KB | TCR_EPD1; in ArmConfigureMmu()