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Searched refs:TEGRA_SE0_BASE (Results 1 – 3 of 3) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_psci_handlers.c114 se_regs[0] = mmio_read_32(TEGRA_SE0_BASE + in tegra_soc_pwr_domain_suspend()
302 mmio_write_32(TEGRA_SE0_BASE + SE_MUTEX_WATCHDOG_NS_LIMIT, in tegra_soc_pwr_domain_on_finish()
Dplat_setup.c74 MAP_REGION_FLAT(TEGRA_SE0_BASE, 0x10000, /* 64KB */
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/t186/
Dtegra_def.h188 #define TEGRA_SE0_BASE U(0x03AC0000) macro