| /device/linaro/bootloader/edk2/ArmPlatformPkg/Include/Drivers/ |
| D | PL310L2Cache.h | 65 #define PL310_LATENCIES(Write,Read,Setup) (((Write) << 8) | ((Read) << 4) | (Setup)) argument
66 #define PL310_TAG_LATENCIES(Write,Read,Setup) PL310_LATENCIES(Write,Read,Setup) argument
67 #define PL310_DATA_LATENCIES(Write,Read,Setup) PL310_LATENCIES(Write,Read,Setup) argument
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| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Phy/MvPhyDxe/ |
| D | MvPhyDxe.c | 75 Mdio->Write(Mdio, PhyAddr, MII_BMCR, Reg); in MvPhyReset()
115 Mdio->Write(Mdio, PhyDev->Addr, MIIM_88E1111_PHY_EXT_CR, Reg); in MvPhyM88e1111sConfig()
126 Mdio->Write(Mdio, PhyDev->Addr, MIIM_88E1111_PHY_EXT_SR, Reg); in MvPhyM88e1111sConfig()
136 Mdio->Write(Mdio, PhyDev->Addr, MIIM_88E1111_PHY_EXT_SR, Reg); in MvPhyM88e1111sConfig()
142 Mdio->Write(Mdio, PhyDev->Addr, MIIM_88E1111_PHY_EXT_CR, Reg); in MvPhyM88e1111sConfig()
148 Mdio->Write(Mdio, PhyDev->Addr, MIIM_88E1111_PHY_EXT_SR, Reg); in MvPhyM88e1111sConfig()
158 Mdio->Write(Mdio, PhyDev->Addr, MIIM_88E1111_PHY_EXT_SR, Reg); in MvPhyM88e1111sConfig()
164 Mdio->Write(Mdio, PhyDev->Addr, MII_BMCR, Reg); in MvPhyM88e1111sConfig()
262 Mdio->Write(Mdio, PhyAddr, RegNum, Reg); in MvPhy1512WriteBits()
281 Mdio->Write(Mdio, PhyAddr, 22, 0x00ff); in MvPhyInit1512()
[all …]
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/EfiScriptLib/ |
| D | EfiScriptLib.c | 148 mBootScriptSave->Write ( in BootScriptSaveIoWrite()
198 mBootScriptSave->Write ( in BootScriptSaveIoReadWrite()
248 mBootScriptSave->Write ( in BootScriptSaveMemWrite()
298 mBootScriptSave->Write ( in BootScriptSaveMemReadWrite()
348 mBootScriptSave->Write ( in BootScriptSavePciCfgWrite()
398 mBootScriptSave->Write ( in BootScriptSavePciCfgReadWrite()
452 mBootScriptSave->Write ( in BootScriptSaveSmbusExecute()
498 mBootScriptSave->Write ( in BootScriptSaveStall()
536 mBootScriptSave->Write ( in BootScriptSaveDispatch()
587 mBootScriptSave->Write ( in BootScriptMemPoll()
[all …]
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| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/Arm/ |
| D | ArmV7Support.asm | 76 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
84 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
97 mcr p15, 0, r0, c1, c0, 0 ; Write control register
111 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
120 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
129 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
138 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
152 mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
160 mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
168 mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)
[all …]
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| D | ArmV7ArchTimerSupport.asm | 24 mcr p15, 0, r0, c14, c0, 0 ; Write to CNTFRQ
36 mcr p15, 0, r0, c14, c1, 0 ; Write to CNTK_CTL (Timer PL1 Control Register)
44 mcr p15, 0, r0, c14, c2, 0 ; Write to CNTP_TVAL (PL1 physical timer value register)
52 mcr p15, 0, r0, c14, c2, 1 ; Write to CNTP_CTL (PL1 Physical Timer Control Register)
60 mcr p15, 0, r0, c14, c3, 0 ; Write to CNTV_TVAL (Virtual Timer Value register)
68 mcr p15, 0, r0, c14, c3, 1 ; Write to CNTV_CTL (Virtual Timer Control Register)
80 mcrr p15, 2, r0, r1, c14 ; Write to CNTP_CTVAL (Physical Timer Compare Value Register)
96 mcrr p15, 4, r0, r1, c14 ; Write to CNTVOFF (Virtual Offset register)
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| D | ArmV7ArchTimerSupport.S | 23 mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ
35 mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)
43 mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)
51 mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)
59 mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)
67 mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)
79 mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
95 mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)
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| /device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/ |
| D | PcatIo.c | 57 return gCpuIo->Io.Write ( in PcatRootBridgeIoIoWrite()
87 IN BOOLEAN Write, in PcatRootBridgeIoPciRW() argument
172 This->Io.Write (This, EfiPciWidthUint32, PrivateData->PciAddress, 1, &PciAligned); in PcatRootBridgeIoPciRW()
173 if (Write) { in PcatRootBridgeIoPciRW()
174 This->Io.Write (This, Width, PciData, 1, UserBuffer); in PcatRootBridgeIoPciRW()
198 if (Write) { in PcatRootBridgeIoPciRW()
199 This->Mem.Write (This, Width, (UINTN) PciExpressRegAddr, 1, UserBuffer); in PcatRootBridgeIoPciRW()
353 IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x26, 1, &Register); in CheckForRom()
354 IoDev->Pci.Write (IoDev, EfiPciWidthUint32, Address + 0x2c, 1, &Register); in CheckForRom()
356 IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x24, 1, &Register); in CheckForRom()
[all …]
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| /device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/X64/ |
| D | PcatIo.c | 57 return gCpuIo->Io.Write ( in PcatRootBridgeIoIoWrite()
87 IN BOOLEAN Write, in PcatRootBridgeIoPciRW() argument
172 This->Io.Write (This, EfiPciWidthUint32, PrivateData->PciAddress, 1, &PciAligned); in PcatRootBridgeIoPciRW()
173 if (Write) { in PcatRootBridgeIoPciRW()
174 This->Io.Write (This, Width, PciData, 1, UserBuffer); in PcatRootBridgeIoPciRW()
198 if (Write) { in PcatRootBridgeIoPciRW()
199 This->Mem.Write (This, Width, (UINTN) PciExpressRegAddr, 1, UserBuffer); in PcatRootBridgeIoPciRW()
353 IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x26, 1, &Register); in CheckForRom()
354 IoDev->Pci.Write (IoDev, EfiPciWidthUint32, Address + 0x2c, 1, &Register); in CheckForRom()
356 IoDev->Pci.Write (IoDev, EfiPciWidthUint16, Address + 0x24, 1, &Register); in CheckForRom()
[all …]
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| /device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/ |
| D | PciEnumeratorSupport.c | 528 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &gAllOne); in GatherPPBInfo()
530 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &Temp); in GatherPPBInfo()
709 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &gAllOne); in BarExisted()
715 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &OriginalValue); in BarExisted()
1065 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &gAllOne); in InitializePPB()
1066 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1D, 1, &gAllZero); in InitializePPB()
1068 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, 0x20, 1, &gAllOne); in InitializePPB()
1069 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, 0x22, 1, &gAllZero); in InitializePPB()
1071 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, 0x24, 1, &gAllOne); in InitializePPB()
1072 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, 0x26, 1, &gAllZero); in InitializePPB()
[all …]
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| D | PciCommand.c | 82 return PciIo->Pci.Write ( in PciSetCommandRegister()
126 return PciIo->Pci.Write ( in PciEnableCommandRegister()
170 return PciIo->Pci.Write ( in PciDisableCommandRegister()
205 return PciIo->Pci.Write ( in PciSetBridgeControlRegister()
249 return PciIo->Pci.Write ( in PciEnableBridgeControlRegister()
292 return PciIo->Pci.Write ( in PciDisableBridgeControlRegister()
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| /device/google/cuttlefish_common/guest/commands/usbforward/ |
| D | usb_server.cpp | 129 fd_->Write(&rsp, sizeof(rsp)); in HandleDeviceList()
132 fd_->Write(&cnt, sizeof(cnt)); in HandleDeviceList()
133 fd_->Write(&info, sizeof(info)); in HandleDeviceList()
134 fd_->Write(ifaces.data(), ifaces.size() * sizeof(InterfaceInfo)); in HandleDeviceList()
138 fd_->Write(&cnt, sizeof(cnt)); in HandleDeviceList()
149 fd_->Write(&rsp, sizeof(rsp)); in HandleAttach()
155 fd_->Write(&rsp, sizeof(rsp)); in HandleHeartbeat()
253 fd_->Write(&rsp, sizeof(rsp)); in OnTransferComplete()
255 fd_->Write(&actual_length, sizeof(actual_length)); in OnTransferComplete()
261 int packet_size = fd_->Write(&buffer[sent], actual_length - sent); in OnTransferComplete()
[all …]
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/ |
| D | SDController.c | 279 PciIo->Mem.Write ( in SetHighSpeedMode()
314 PciIo->Mem.Write ( in SetDDRMode()
366 PciIo->Mem.Write ( in HostLEDEnable()
504 PciIo->Mem.Write ( in SendCommand()
514 PciIo->Mem.Write ( in SendCommand()
525 PciIo->Mem.Write ( in SendCommand()
550 PciIo->Mem.Write ( in SendCommand()
563 PciIo->Mem.Write ( in SendCommand()
574 PciIo->Mem.Write ( in SendCommand()
582 PciIo->Mem.Write ( in SendCommand()
[all …]
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| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/RealTimeClockLib/ |
| D | RealTimeClockLib.c | 70 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, RTC_CTRL_REG), 1,… in LibGetTime()
156 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, YEARS_REG), 1, &D… in LibSetTime()
160 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, MONTHS_REG), 1, &… in LibSetTime()
164 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, DAYS_REG), 1, &Da… in LibSetTime()
168 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, HOURS_REG), 1, &D… in LibSetTime()
172 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, MINUTES_REG), 1, … in LibSetTime()
176 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, SECONDS_REG), 1, … in LibSetTime()
260 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, RTC_CTRL_REG), 1,… in LibRtcInitialize()
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| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MvMdioDxe/ |
| D | MvMdioDxe.c | 120 IN BOOLEAN Write, in MdioOperation() argument
143 if (Write) { in MdioOperation()
154 Status = Write ? MdioWaitReady () : MdioWaitValid (); in MdioOperation()
160 if (!Write) { in MdioOperation()
219 Mdio->Write = MvMdioWrite; in MvMdioDxeInitialise()
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Smm/SmmScriptLib/ |
| D | SmmScriptLib.c | 55 return mS3SmmSaveState->Write ( in BootScriptIoWrite()
89 return mS3SmmSaveState->Write ( in BootScriptIoReadWrite()
123 return mS3SmmSaveState->Write ( in BootScriptMemReadWrite()
157 return mS3SmmSaveState->Write ( in BootScriptPciCfgReadWrite()
191 return mS3SmmSaveState->Write ( in BootScriptPciCfgWrite()
219 return mS3SmmSaveState->Write ( in BootScriptStall()
244 return mS3SmmSaveState->Write ( in BootScriptDispatch()
275 return mS3SmmSaveState->Write ( in BootScriptMemWrite()
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1616/D05AcpiTables/ |
| D | D05Iort.asl | 127 Write Allocate : 0
158 Write Allocate : 0
189 Write Allocate : 0
220 Write Allocate : 0
251 Write Allocate : 0
282 Write Allocate : 0
313 Write Allocate : 0
344 Write Allocate : 0
375 Write Allocate : 0
405 Write Allocate : 0
[all …]
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| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/FaultTolerantWriteDxe/ |
| D | FaultTolerantWriteDxe.uni | 2 // Fault Tolerant Write Dxe Driver.
4 // This driver installs Fault Tolerant Write (FTW) protocol,
20 #string STR_MODULE_ABSTRACT #language en-US "Fault Tolerant Write Dxe Driver."
22 #string STR_MODULE_DESCRIPTION #language en-US "Installs Fault Tolerant Write (FTW) protoc…
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| D | SmmFaultTolerantWriteDxe.uni | 2 // Fault Tolerant Write Smm Driver.
4 // This driver installs SMM Fault Tolerant Write (FTW) protocol, which provides fault
21 #string STR_MODULE_ABSTRACT #language en-US "Fault Tolerant Write Smm Driver."
23 #string STR_MODULE_DESCRIPTION #language en-US "Installs SMM Fault Tolerant Write (FTW) pr…
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Compatibility/BootScriptSaveOnS3SaveStateThunk/ |
| D | ScriptSave.c | 102 return mS3SaveState->Write ( in BootScriptIoWrite()
136 return mS3SaveState->Write ( in BootScriptIoReadWrite()
171 return mS3SaveState->Write ( in BootScriptMemWrite()
206 return mS3SaveState->Write ( in BootScriptMemReadWrite()
241 return mS3SaveState->Write ( in BootScriptPciCfgWrite()
276 return mS3SaveState->Write ( in BootScriptPciCfgReadWrite()
312 return mS3SaveState->Write ( in BootScriptPciCfg2Write()
350 return mS3SaveState->Write ( in BootScriptPciCfg2ReadWrite()
389 return mS3SaveState->Write ( in BootScriptSmbusExecute()
419 return mS3SaveState->Write ( in BootScriptStall()
[all …]
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/ |
| D | PciDevice.c | 143 PciIo->Pci.Write (
186 PciIo->Pci.Write (
212 PciIo->Pci.Write (
241 PciIo->Pci.Write (
277 PciIo->Pci.Write (
294 PciIo->Pci.Write (
320 PciIo->Pci.Write (
476 Status = PciIo->Pci.Write ( in PciBusEvent()
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ |
| D | PciResourceSupport.c | 1328 PciIo->Pci.Write ( in ProgramBar()
1345 PciIo->Pci.Write ( in ProgramBar()
1355 PciIo->Pci.Write ( in ProgramBar()
1410 PciIo->Pci.Write ( in ProgramVfBar()
1426 PciIo->Pci.Write ( in ProgramVfBar()
1436 PciIo->Pci.Write ( in ProgramVfBar()
1506 PciIo->Pci.Write ( in ProgramPpbApperture()
1523 PciIo->Pci.Write ( in ProgramPpbApperture()
1533 PciIo->Pci.Write ( in ProgramPpbApperture()
1553 PciIo->Pci.Write ( in ProgramPpbApperture()
[all …]
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| D | PciEnumeratorSupport.c | 588 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &gAllOne); in GatherPpbInfo()
590 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &Temp); in GatherPpbInfo()
613 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &Value); in GatherPpbInfo()
615 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &Temp); in GatherPpbInfo()
821 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT32)Offset, 1, &gAllOne); in VfBarExisted()
827 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT32)Offset, 1, &OriginalValue); in VfBarExisted()
886 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &gAllOne); in BarExisted()
892 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, (UINT8) Offset, 1, &OriginalValue); in BarExisted()
1989 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllOne); in InitializePciDevice()
2013 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &gAllOne); in InitializePpb()
[all …]
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/ |
| D | D03Iort.asl | 48 Write Allocate : 0
79 Write Allocate : 0
110 Write Allocate : 0
141 Write Allocate : 0
172 Write Allocate : 0
203 Write Allocate : 0
234 Write Allocate : 0
265 Write Allocate : 0
295 Write Allocate : 0
324 Write Allocate : 0
[all …]
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| /device/linaro/bootloader/edk2/Omap35xxPkg/PciEmulation/ |
| D | PciEmulation.c | 68 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VAUX2_DEV_GRP), 1… in ConfigureUSBHost()
72 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VAUX2_DEDICATED),… in ConfigureUSBHost()
83 …Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data); in ConfigureUSBHost()
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| /device/google/cuttlefish_common/common/vsoc/lib/ |
| D | circqueue_test.cpp | 61 return layout->byte_queue.Write(region, buffer_in, bytes); in WriteBytes()
73 return layout->packet_queue.Write(region, buffer_in, packet_size); in WritePacket()
87 total_read += layout->byte_queue.Write(region, buffer_out, remaining); in ReadBytesInChunk()
98 int ret = layout->byte_queue.Write(region, buffer_in, chuck_size); in WriteBytesInChunk()
103 total_write += layout->byte_queue.Write(region, buffer_in, remaining); in WriteBytesInChunk()
127 int ret = layout->packet_queue.Write(region, buffer_in, packet_size); in WriteManyPackets()
188 layout->byte_queue.Write(&this->region_, buffer_in, num_bytes); in TEST_F()
280 layout->packet_queue.Write(&this->region_, buffer_in, packet_size); in TEST_F()
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