| /device/linaro/bootloader/edk2/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ |
| D | CompareMem.S | 86 bic data1, data1, mask
87 bic data2, data2, mask
114 bic src1, src1, #7
115 bic src2, src2, #7
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| D | SetMem.S | 150 bic dst, dstin, 15
181 bic dst, dst, 63
207 bic dst, dst, 127
232 bic tmp1, tmp1, tmp2 // Aligned dc zva start address.
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| /device/linaro/bootloader/edk2/MdePkg/Library/BaseMemoryLibOptDxe/Arm/ |
| D | CompareMem.S | 82 bic data1, data1, mask
83 bic data2, data2, mask
110 bic src1, src1, #3
111 bic src2, src2, #3
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| D | CompareMem.asm | 82 bic data1, data1, mask
83 bic data2, data2, mask
110 bic src1, src1, #3
111 bic src2, src2, #3
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/aarch64/ |
| D | tegra_helpers.S | 73 bic x0, x0, #CORTEX_A57_L2ECTLR_RET_CTRL_MASK
80 bic x0, x0, #CORTEX_A57_ECTLR_CPU_RET_CTRL_MASK
329 bic x0, x0, #1
405 bic w1, w1, #TCPAC_BIT
406 bic w1, w1, #TTA_BIT
407 bic w1, w1, #TFP_BIT
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| /device/linaro/bootloader/arm-trusted-firmware/lib/cpus/aarch64/ |
| D | aem_generic.S | 17 bic x1, x1, #SCTLR_C_BIT
37 bic x1, x1, #SCTLR_C_BIT
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| D | cortex_a35.S | 20 bic x1, x1, #SCTLR_C_BIT
32 bic x0, x0, #CORTEX_A35_CPUECTLR_SMPEN_BIT
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| D | cortex_a72.S | 19 bic x1, x1, #SCTLR_C_BIT
34 bic x0, x0, x1
59 bic x0, x0, #CORTEX_A72_ECTLR_SMP_BIT
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| D | cortex_a73.S | 19 bic x1, x1, #SCTLR_C_BIT
31 bic x0, x0, #CORTEX_A73_CPUECTLR_SMP_BIT
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| D | cortex_a53.S | 25 bic x1, x1, #SCTLR_C_BIT
37 bic x0, x0, #CORTEX_A53_ECTLR_SMP_BIT
60 bic x1, x1, #CORTEX_A53_L2ACTLR_ENABLE_UNIQUECLEAN
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| D | cortex_a57.S | 21 bic x1, x1, #SCTLR_C_BIT
36 bic x0, x0, x1
49 bic x0, x0, #CORTEX_A57_ECTLR_SMP_BIT
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/ |
| D | plat_pmu_macros.S | 84 bic x10, x9, #(SCTLR_M_BIT)
119 bic w0, w0, #DDRCTL0_C_SYSREQ_CFG
120 bic w0, w0, #DDRCTL1_C_SYSREQ_CFG
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| /device/linaro/bootloader/arm-trusted-firmware/plat/common/aarch64/ |
| D | platform_helpers.S | 41 bic x0, x0, #MPIDR_RES_BIT_MASK
43 bic x1, x1, #MPIDR_RES_BIT_MASK
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| /device/linaro/bootloader/arm-trusted-firmware/lib/aarch64/ |
| D | misc_helpers.S | 335 bic tmp1, stop_address, block_mask
358 bic tmp1, stop_address, #15
458 bic x0, x0, x1
480 bic x0, x0, x1
504 bic x0, x0, x1
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| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/Arm/ |
| D | ArmV7Support.S | 81 bic R0,R0,#1
92 bic r0, r0, #CTRL_M_BIT @ Disable MMU
93 bic r0, r0, #CTRL_C_BIT @ Disable D Cache
94 bic r0, r0, #CTRL_I_BIT @ Disable I Cache
117 bic R0,R0,R1 @Clear C bit
135 bic R0,R0,R1 @Clear I bit.
158 bic r0, r0, #0x00000800
166 bic r0, r0, #0x00002000 @ clear V bit
253 bic r0, r0, #0x00002000 @ clear V bit
|
| D | ArmV7Support.asm | 83 bic R0,R0,#1 ; Clear SCTLR.M bit : Disable MMU
94 bic r0, r0, #CTRL_M_BIT ; Disable MMU
95 bic r0, r0, #CTRL_C_BIT ; Disable D Cache
96 bic r0, r0, #CTRL_I_BIT ; Disable I Cache
119 bic R0,R0,R1 ; Clear SCTLR.C bit : Data and unified caches disabled
159 bic r0, r0, #0x00000800 ;
167 bic r0, r0, #0x00002000 ; clear V bit
250 bic r0, r0, #0x00002000 ; clear V bit
|
| /device/linaro/bootloader/arm-trusted-firmware/bl32/sp_min/aarch32/ |
| D | entrypoint.S | 29 bic \reg, \reg, #SCR_FW_BIT
161 bic r0, #SCR_NS_BIT
218 bic r0, #SCR_NS_BIT
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| /device/linaro/bootloader/arm-trusted-firmware/lib/aarch32/ |
| D | misc_helpers.S | 92 bic tmp, stop_address, #(8-1)
175 bic r0, r0, r1
|
| /device/linaro/bootloader/arm-trusted-firmware/include/common/aarch32/ |
| D | asm_macros.S | 152 bic \_reg_h, \_reg_h, #(\_val >> 32)
155 bic \_reg_l, \_reg_l, #(\_val & 0xffffffff)
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/aarch64/ |
| D | hikey960_helpers.S | 148 bic x0, x0, #CORTEX_A53_ECTLR_CPU_RET_CTRL_MASK
163 bic x0, x0, #CORTEX_A53_ECTLR_CPU_RET_CTRL_MASK
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Arm/ |
| D | EnableInterrupts.S | 34 bic R0,R0,#0x80 @Enable IRQ interrupts
|
| /device/linaro/bootloader/arm-trusted-firmware/lib/cpus/aarch32/ |
| D | cortex_a32.S | 21 bic r0, r0, #CORTEX_A32_CPUECTLR_SMPEN_BIT
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hisi_pwrc_sram.S | 23 bic x0, x0, #(CORTEX_A53_CPUACTLR_EL1_RADIS | \
|
| /device/linaro/bootloader/arm-trusted-firmware/lib/psci/aarch32/ |
| D | psci_helpers.S | 110 bic r1, #SCTLR_C_BIT
|
| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmMmuLib/AArch64/ |
| D | ArmMmuLibReplaceEntry.S | 23 bic x9, x8, #CTRL_M_BIT
|