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Searched refs:depends (Results 1 – 25 of 58) sorted by relevance

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/device/linaro/bootloader/edk2/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/
DBootScriptExecutorDxe.uni5 // depends on any PEI or DXE service.
22 …"This is a standalone Boot Script Executor. Standalone means it does not depends on any PEI or DXE…
DBootScriptExecutorDxe.inf5 # depends on any PEI or DXE service.
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/distutils/
Dextension.py102 depends=None, argument
124 self.depends = depends or []
Dbcppcompiler.py83 extra_preargs=None, extra_postargs=None, depends=None): argument
87 depends, extra_postargs)
Dccompiler.py373 def _setup_compile(self, outdir, macros, incdirs, sources, depends, argument
562 extra_postargs=None, depends=None): argument
616 depends, extra_postargs)
Dmsvccompiler.py351 extra_preargs=None, extra_postargs=None, depends=None): argument
356 depends, extra_postargs)
Dmsvc9compiler.py470 extra_preargs=None, extra_postargs=None, depends=None): argument
475 sources, depends, extra_postargs)
/device/linaro/bootloader/edk2/MdeModulePkg/Universal/FaultTolerantWriteDxe/
DFaultTolerantWriteDxe.uni6 // Its implementation depends on the full functionality FVB protocol that support read, write/erase…
22 …es fault tolerant write capability for block devices. Its implementation depends on the full funct…
DSmmFaultTolerantWriteDxe.uni6 // depends on the full functionality SMM FVB protocol that support read, write/erase
23 …rite capability in SMM environment for block devices. Its implementation depends on the full funct…
DFaultTolerantWriteDxe.inf6 # Its implementation depends on the full functionality FVB protocol that support read, write/erase …
DFaultTolerantWriteSmm.inf6 # depends on the full functionality SMM FVB protocol that support read, write/erase
/device/linaro/bootloader/edk2/NetworkPkg/TcpDxe/
DTcpDxe.uni5 // It might provide TCPv4 Protocol or TCPv6 Protocol or both of them that depends on
23 …. It might provide TCPv4 Protocol or TCPv6 Protocol or both of them that depends on which network …
DTcpDxe.inf5 # It might provide TCPv4 Protocol or TCPv6 Protocol or both of them that depends on
/device/linaro/bootloader/edk2/StdLib/LibC/CRT/Ia32/
Dllshr.c26 ; depends only on the high order bit of edx). in _allshr()
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/distutils/command/
Dbuild_ext.py461 depends = sources + ext.depends
462 if not (self.force or newer_group(depends, ext_path, 'newer')):
499 depends=ext.depends)
/device/linaro/bootloader/edk2/EmbeddedPkg/
DEmbeddedPkg.dsc271 # It depends on BdsLib that depends on TimerLib
277 # It depends on BdsLib that depends on TimerLib
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/
DBootScriptExecutorDxe.inf5 # depends on any PEI or DXE service.
/device/linaro/bootloader/edk2/OvmfPkg/ResetVector/
DResetVector.nasmb59 %error "This implementation inherently depends on PcdOvmfSecPageTablesSize"
/device/linaro/bootloader/edk2/PerformancePkg/Library/TscTimerLib/
DPeiTscTimerLib.inf4 # Note: This library is a sample implementation that depends on chipset ACPI timer.
DBaseTscTimerLib.inf7 # Note: This library is a sample implementation that depends on chipset ACPI timer.
DDxeTscTimerLib.inf4 # Note: This library is a sample implementation that depends on chipset ACPI timer.
/device/linaro/bootloader/edk2/CryptoPkg/Library/OpensslLib/
DPatch-HOWTO.txt13 2.2 (http://www.uefi.org). These security features highly depends on the
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/
DPlatformPei.inf49 # This PEIM does not have any register access directly, it depends on
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/
DPlatformEarlyInit.inf27 # This PEIM does not have any register access directly, it depends on
/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/Sdk/DOC/
Dlzma-sdk.txt204 2) Mispredicted branches (penalty mostly depends from pipeline length)
207 The speed of LZMA decompressing mostly depends from CPU speed.

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