| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/include/ |
| D | plat_macros.S | 25 mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID)
33 mov_imm x17, BASE_GICC_BASE
34 mov_imm x16, BASE_GICD_BASE
37 mov_imm x17, VE_GICC_BASE
38 mov_imm x16, VE_GICD_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/qemu/aarch64/ |
| D | plat_helpers.S | 67 mov_imm x2, PLAT_QEMU_HOLD_BASE
73 mov_imm x0, PLAT_QEMU_TRUSTED_MAILBOX_BASE
99 mov_imm x0, PLAT_QEMU_CRASH_UART_BASE
100 mov_imm x1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ
101 mov_imm x2, PLAT_QEMU_CONSOLE_BAUDRATE
113 mov_imm x1, PLAT_QEMU_CRASH_UART_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/ |
| D | plat_helpers.S | 63 mov_imm x0, MT8173_UART0_BASE
64 mov_imm x1, MT8173_UART_CLOCK
65 mov_imm x2, MT8173_BAUDRATE
77 mov_imm x1, MT8173_UART0_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/ |
| D | plat_helpers.S | 34 mov_imm x1, 0xdead1abf
104 mov_imm x0, UART0_BASE
105 mov_imm x1, UART_CLOCK
106 mov_imm x2, UART_BAUDRATE
119 mov_imm x1, UART0_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/aarch64/ |
| D | arm_helpers.S | 51 mov_imm x0, PLAT_ARM_CRASH_UART_BASE
52 mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ
53 mov_imm x2, ARM_CONSOLE_BAUDRATE
65 mov_imm x1, PLAT_ARM_CRASH_UART_BASE
78 mov_imm x1, PLAT_ARM_CRASH_UART_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/juno/aarch64/ |
| D | juno_helpers.S | 176 mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID)
233 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
246 mov_imm \_reg_d, (0xe3000000 | \
256 mov_imm \_reg_d, (0xe3400000 | \
281 mov_imm w2, 0xe12fff10
284 mov_imm x3, HI_VECTOR_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/include/ |
| D | plat_macros.S | 35 mov_imm x16, BASE_GICD_BASE
36 mov_imm x17, BASE_GICC_BASE
69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/include/ |
| D | plat_macros.S | 37 mov_imm x16, GICD_REG_BASE
38 mov_imm x17, GICC_REG_BASE
68 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
72 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/include/ |
| D | plat_macros.S | 30 mov_imm x16, BASE_GICD_BASE
31 mov_imm x17, BASE_GICC_BASE
77 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
81 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/include/ |
| D | plat_macros.S | 37 mov_imm x16, PLAT_ARM_GICD_BASE
38 mov_imm x17, PLAT_ARM_GICC_BASE
68 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
72 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/include/ |
| D | plat_macros.S | 47 mov_imm x16, PLAT_RK_GICD_BASE
48 mov_imm x17, PLAT_RK_GICC_BASE
106 mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
110 mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/qemu/include/ |
| D | plat_macros.S | 21 mov_imm x17, GICC_BASE
22 mov_imm x16, GICD_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/include/plat/arm/css/common/aarch64/ |
| D | css_macros.S | 20 mov_imm x16, PLAT_ARM_GICD_BASE
21 mov_imm x17, PLAT_ARM_GICC_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/include/ |
| D | plat_macros.S | 22 mov_imm x17, BASE_GICC_BASE
23 mov_imm x16, BASE_GICD_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/aarch64/ |
| D | hikey_helpers.S | 45 mov_imm x0, CRASH_CONSOLE_BASE
46 mov_imm x1, PL011_UART_CLK_IN_HZ
47 mov_imm x2, PL011_BAUDRATE
59 mov_imm x1, CRASH_CONSOLE_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/aarch64/ |
| D | plat_helpers.S | 92 mov_imm x0, PLAT_RK_UART_BASE
93 mov_imm x1, PLAT_RK_UART_CLOCK
94 mov_imm x2, PLAT_RK_UART_BAUDRATE
106 mov_imm x1, PLAT_RK_UART_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/include/plat/arm/common/aarch64/ |
| D | cci_macros.S | 26 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
30 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/aarch64/ |
| D | hikey960_helpers.S | 51 mov_imm x0, CRASH_CONSOLE_BASE
52 mov_imm x1, PL011_UART_CLK_IN_HZ
53 mov_imm x2, PL011_BAUDRATE
65 mov_imm x1, CRASH_CONSOLE_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/include/common/aarch64/ |
| D | el3_common_macros.S | 113 mov_imm x0, ((MDCR_EL3_RESET_VAL | MDCR_SDD_BIT | MDCR_SPD32(MDCR_SPD32_DISABLE)) \
151 mov_imm x0, (CPTR_EL3_RESET_VAL & ~(TCPAC_BIT | TTA_BIT | TFP_BIT))
219 mov_imm x0, (SCTLR_RESET_VAL & ~(SCTLR_EE_BIT | SCTLR_WXN_BIT \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/ |
| D | plat_macros.S | 30 mov_imm x16, TEGRA_GICC_BASE
42 mov_imm x16, TEGRA_GICD_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/common/aarch64/ |
| D | css_helpers.S | 35 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
63 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
|
| /device/linaro/bootloader/arm-trusted-firmware/bl32/tsp/aarch64/ |
| D | tsp_entrypoint.S | 336 mov_imm x2, TSP_HANDLE_SEL1_INTR_AND_RETURN
367 mov_imm x1, TSP_PREEMPTED
371 mov_imm x0, TSP_HANDLED_S_EL1_INTR
|
| /device/linaro/bootloader/arm-trusted-firmware/lib/el3_runtime/aarch32/ |
| D | cpu_data.S | 37 mov_imm r1, CPU_DATA_SIZE
|
| /device/linaro/bootloader/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
| D | cpu_data.S | 42 mov_imm x1, CPU_DATA_SIZE
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/ |
| D | uniphier_smp.S | 15 mov_imm x1, MPIDR_AFFINITY_MASK
|