Searched refs:mt6795_mcucfg (Results 1 – 4 of 4) sorted by relevance
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/ |
D | scu.c | 14 mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg, in disable_scu() 17 mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config, in disable_scu() 24 mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg, in enable_scu() 27 mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config, in enable_scu()
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D | bl31_plat_setup.c | 127 mmio_write_32((uintptr_t)&mt6795_mcucfg->mp1_config_res, in platform_setup_cpu() 133 mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg, MP1_AINACTS); in platform_setup_cpu() 134 mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp1_clkenm_div, in platform_setup_cpu() 136 mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp1_rst_ctl, in platform_setup_cpu() 140 mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp1_cpucfg, in platform_setup_cpu() 144 mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp0_rv_addr[0].rv_addr_hw, in platform_setup_cpu()
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D | plat_pm.c | 255 rv = (uintptr_t)&mt6795_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_on() 257 rv = (uintptr_t)&mt6795_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_on() 328 rv = (uintptr_t)&mt6795_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_suspend() 330 rv = (uintptr_t)&mt6795_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_suspend()
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/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/include/ |
D | mcucfg.h | 104 static struct mt6795_mcucfg_regs *const mt6795_mcucfg = (void *)MCUCFG_BASE; variable
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