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/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Tools/unicode/
Dlistcodecs.py14 names = []
31 names.append(name)
32 return names
36 names = listcodecs(encodings.__path__[0]) variable
37 names.sort()
39 for name in names:
/device/linaro/bootloader/arm-trusted-firmware/fdts/
Drtsm_ve-motherboard.dtsi36 clock-output-names = "v2m:clk24mhz";
43 clock-output-names = "v2m:refclk1mhz";
50 clock-output-names = "v2m:refclk32khz";
70 clock-names = "refclk", "timclk", "apb_pclk";
72 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
80 clock-names = "apb_pclk";
92 clock-names = "mclk", "apb_pclk";
100 clock-names = "KMIREFCLK", "apb_pclk";
108 clock-names = "KMIREFCLK", "apb_pclk";
116 clock-names = "uartclk", "apb_pclk";
[all …]
Dfvp-foundation-motherboard.dtsi24 clock-output-names = "v2m:clk24mhz";
31 clock-output-names = "v2m:refclk1mhz";
38 clock-output-names = "v2m:refclk32khz";
58 clock-names = "refclk", "timclk", "apb_pclk";
60 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
68 clock-names = "uartclk", "apb_pclk";
76 clock-names = "uartclk", "apb_pclk";
84 clock-names = "uartclk", "apb_pclk";
92 clock-names = "uartclk", "apb_pclk";
100 clock-names = "wdogclk", "apb_pclk";
[all …]
/device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/DeviceTree/
Dhi3660.dtsi309 clock-names = "timer1", "timer2", "apb_pclk";
321 pinctrl-names = "default";
335 pinctrl-names = "default";
349 pinctrl-names = "default";
363 pinctrl-names = "default";
374 clock-names = "uartclk", "apb_pclk";
375 pinctrl-names = "default";
386 clock-names = "uartclk", "apb_pclk";
387 pinctrl-names = "default";
398 clock-names = "uartclk", "apb_pclk";
[all …]
Dhi6220.dtsi281 mbox-names = "mbox-tx";
291 clock-names = "uartclk", "apb_pclk";
300 clock-names = "uartclk", "apb_pclk";
301 pinctrl-names = "default";
312 clock-names = "uartclk", "apb_pclk";
313 pinctrl-names = "default";
324 clock-names = "uartclk", "apb_pclk";
325 pinctrl-names = "default";
336 clock-names = "uartclk", "apb_pclk";
337 pinctrl-names = "default";
[all …]
Dhi3660-hikey960.dts73 pinctrl-names = "default";
211 * Line names are taken from "HiKey 960 Board ver A" schematics
222 * LSEC is named UART0 while the schematic and SoC names this
229 gpio-line-names =
242 gpio-line-names =
254 gpio-line-names =
266 gpio-line-names =
279 gpio-line-names =
289 gpio-line-names =
301 gpio-line-names =
[all …]
Dhi6220-coresight.dtsi21 clock-names = "apb_pclk";
50 clock-names = "apb_pclk";
78 clock-names = "apb_pclk";
115 clock-names = "apb_pclk";
136 clock-names = "apb_pclk";
157 clock-names = "apb_pclk";
250 clock-names = "apb_pclk";
267 clock-names = "apb_pclk";
284 clock-names = "apb_pclk";
301 clock-names = "apb_pclk";
[all …]
Dhi6220-hikey.dts120 clock-names = "ext_clock";
146 clock-names = "ext_clock";
177 * LSEC is named UART0 while the schematic and SoC names this
183 gpio-line-names = "PWR_HOLD", "DSI_SEL",
189 gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
194 gpio-line-names =
205 gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
210 gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
215 gpio-line-names = "NC", "NC",
224 gpio-line-names =
[all …]
/device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/VExpress/DeviceTree/
Drtsm_ve-motherboard-no_psci.dtsi14 * Neither the name of ARM nor the names of its contributors may be used
61 clock-output-names = "v2m:clk24mhz";
68 clock-output-names = "v2m:refclk1mhz";
75 clock-output-names = "v2m:refclk32khz";
95 clock-names = "refclk", "timclk", "apb_pclk";
97 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
105 clock-names = "apb_pclk";
117 clock-names = "mclk", "apb_pclk";
125 clock-names = "KMIREFCLK", "apb_pclk";
133 clock-names = "KMIREFCLK", "apb_pclk";
[all …]
Drtsm_ve-motherboard.dtsi14 * Neither the name of ARM nor the names of its contributors may be used
61 clock-output-names = "v2m:clk24mhz";
68 clock-output-names = "v2m:refclk1mhz";
75 clock-output-names = "v2m:refclk32khz";
95 clock-names = "refclk", "timclk", "apb_pclk";
97 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
105 clock-names = "apb_pclk";
117 clock-names = "mclk", "apb_pclk";
125 clock-names = "KMIREFCLK", "apb_pclk";
133 clock-names = "KMIREFCLK", "apb_pclk";
[all …]
Dfvp-foundation-motherboard-no_psci.dtsi14 * Neither the name of the ARM nor the names of its contributors may be used
49 clock-output-names = "v2m:clk24mhz";
56 clock-output-names = "v2m:refclk1mhz";
63 clock-output-names = "v2m:refclk32khz";
83 clock-names = "refclk", "timclk", "apb_pclk";
85 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
93 clock-names = "uartclk", "apb_pclk";
101 clock-names = "uartclk", "apb_pclk";
109 clock-names = "uartclk", "apb_pclk";
117 clock-names = "uartclk", "apb_pclk";
[all …]
Dfvp-foundation-motherboard.dtsi14 * Neither the name of the ARM nor the names of its contributors may be used
49 clock-output-names = "v2m:clk24mhz";
56 clock-output-names = "v2m:refclk1mhz";
63 clock-output-names = "v2m:refclk32khz";
83 clock-names = "refclk", "timclk", "apb_pclk";
85 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
93 clock-names = "uartclk", "apb_pclk";
101 clock-names = "uartclk", "apb_pclk";
109 clock-names = "uartclk", "apb_pclk";
117 clock-names = "uartclk", "apb_pclk";
[all …]
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Demo/pdist/
Dserver.py104 names = cl.__dict__.keys()
105 names = filter(lambda x: x[0] != '_', names)
106 names.sort()
109 basenames = filter(lambda x, names=names: x not in names, basenames)
110 names[len(names):] = basenames
111 return names
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/test/
Dtest___all__.py25 names = {}
29 exec "import %s" % modname in names
37 names = {}
39 exec "from %s import *" % modname in names
44 if "__builtins__" in names:
45 del names["__builtins__"]
46 keys = set(names)
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.10/Lib/
Dcopy_reg.py107 names = cls.__dict__.get("__slotnames__")
108 if names is not None:
109 return names
112 names = []
130 names.append('_%s%s' % (c.__name__, name))
132 names.append(name)
136 cls.__slotnames__ = names
140 return names
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/
Dcopy_reg.py107 names = cls.__dict__.get("__slotnames__")
108 if names is not None:
109 return names
112 names = []
130 names.append('_%s%s' % (c.__name__, name))
132 names.append(name)
136 cls.__slotnames__ = names
140 return names
Dglob.py56 names = os.listdir(dirname)
60 names = filter(lambda x: x[0] != '.', names)
61 return fnmatch.filter(names, pattern)
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/lib2to3/fixes/
Dfix_urllib.py85 names = []
89 names.extend([Name(name[0], prefix=pref), Comma()])
90 names.append(Name(MAPPING[import_mod.value][-1][0], prefix=pref))
91 import_mod.replace(names)
150 names = []
152 names.extend(handle_name(elt, pref))
153 names.append(Comma())
154 names.extend(handle_name(elts[-1], pref))
155 new = FromImport(module, names)
Dfix_exitfunc.py59 names = self.sys_import.children[1]
60 if names.type == syms.dotted_as_names:
61 names.append_child(Comma())
62 names.append_child(Name(u"atexit", u" "))
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/
Dstyx-overdrive.dts86 clock-output-names = "adl3clk_100mhz";
93 clock-output-names = "ccpclk_375mhz";
100 clock-output-names = "sataclk_333mhz";
109 clock-output-names = "pcieclk_500mhz";
116 clock-output-names = "dmaclk_500mhz";
123 clock-output-names = "miscclk_250mhz";
132 clock-output-names = "uartspiclk_100mhz";
173 clock-names = "uartclk", "apb_pclk";
182 clock-names = "apb_pclk";
191 clock-names = "apb_pclk";
[all …]
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Overdrive1000Board/FdtBlob/
Dstyx-overdrive1000.dts86 clock-output-names = "adl3clk_100mhz";
93 clock-output-names = "ccpclk_375mhz";
100 clock-output-names = "sataclk_333mhz";
109 clock-output-names = "pcieclk_500mhz";
116 clock-output-names = "dmaclk_500mhz";
123 clock-output-names = "miscclk_250mhz";
132 clock-output-names = "uartspiclk_100mhz";
173 clock-names = "uartclk", "apb_pclk";
182 clock-names = "apb_pclk";
191 clock-names = "apb_pclk";
[all …]
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.10/Python/
Dfuture.c18 asdl_seq *names; in future_check_features() local
22 names = s->v.ImportFrom.names; in future_check_features()
23 for (i = 0; i < asdl_seq_LEN(names); i++) { in future_check_features()
24 alias_ty name = (alias_ty)asdl_seq_GET(names, i); in future_check_features()
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Python/
Dfuture.c18 asdl_seq *names; in future_check_features() local
22 names = s->v.ImportFrom.names; in future_check_features()
23 for (i = 0; i < asdl_seq_LEN(names); i++) { in future_check_features()
24 alias_ty name = (alias_ty)asdl_seq_GET(names, i); in future_check_features()
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Tools/scripts/
Dfindlinksto.py27 def visit(prog, dirname, names): argument
29 names[:] = []
33 for name in names:
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Demo/comparisons/
Dsystemtest.py43 names = os.listdir('.')
47 names.sort()
48 for name in names:

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