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Searched refs:pwr_domain_state (Results 1 – 25 of 26) sorted by relevance

12

/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/
Dplat_psci_handlers.c45 req_state->pwr_domain_state[MPIDR_AFFLVL0] = state_id & 0xff; in tegra_soc_validate_power_state()
54 req_state->pwr_domain_state[MPIDR_AFFLVL1] = state_id; in tegra_soc_validate_power_state()
55 req_state->pwr_domain_state[MPIDR_AFFLVL0] = state_id; in tegra_soc_validate_power_state()
64 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in tegra_soc_validate_power_state()
66 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = in tegra_soc_validate_power_state()
115 const plat_local_state_t *pwr_domain_state = in tegra_soc_pwr_domain_suspend() local
116 target_state->pwr_domain_state; in tegra_soc_pwr_domain_suspend()
117 unsigned int stateid_afflvl2 = pwr_domain_state[MPIDR_AFFLVL2]; in tegra_soc_pwr_domain_suspend()
118 unsigned int stateid_afflvl1 = pwr_domain_state[MPIDR_AFFLVL1]; in tegra_soc_pwr_domain_suspend()
119 unsigned int stateid_afflvl0 = pwr_domain_state[MPIDR_AFFLVL0]; in tegra_soc_pwr_domain_suspend()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/
Dfvp_pm.c86 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_power_domain_on_finish_common()
93 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == in fvp_power_domain_on_finish_common()
110 if (target_state->pwr_domain_state[ARM_PWR_LVL2] == in fvp_power_domain_on_finish_common()
166 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_off()
184 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == in fvp_pwr_domain_off()
202 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend()
206 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend()
225 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == in fvp_pwr_domain_suspend()
230 if (target_state->pwr_domain_state[ARM_PWR_LVL2] == in fvp_pwr_domain_suspend()
266 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend_finish()
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/device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/
Dplat_psci.c95 __func__, i, target_state->pwr_domain_state[i]); in zynqmp_nopmu_pwr_domain_off()
113 __func__, i, target_state->pwr_domain_state[i]); in zynqmp_pwr_domain_off()
136 __func__, i, target_state->pwr_domain_state[i]); in zynqmp_nopmu_pwr_domain_suspend()
164 __func__, i, target_state->pwr_domain_state[i]); in zynqmp_pwr_domain_suspend()
166 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in zynqmp_pwr_domain_suspend()
173 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend()
183 __func__, i, target_state->pwr_domain_state[i]); in zynqmp_pwr_domain_on_finish()
196 __func__, i, target_state->pwr_domain_state[i]); in zynqmp_nopmu_pwr_domain_suspend_finish()
214 __func__, i, target_state->pwr_domain_state[i]); in zynqmp_pwr_domain_suspend_finish()
222 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend_finish()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_psci_handlers.c72 req_state->pwr_domain_state[MPIDR_AFFLVL0] = state_id; in tegra_soc_validate_power_state()
73 req_state->pwr_domain_state[MPIDR_AFFLVL1] = state_id; in tegra_soc_validate_power_state()
87 const plat_local_state_t *pwr_domain_state; in tegra_soc_pwr_domain_suspend() local
96 pwr_domain_state = target_state->pwr_domain_state; in tegra_soc_pwr_domain_suspend()
97 stateid_afflvl0 = pwr_domain_state[MPIDR_AFFLVL0] & in tegra_soc_pwr_domain_suspend()
99 stateid_afflvl2 = pwr_domain_state[PLAT_MAX_PWR_LVL] & in tegra_soc_pwr_domain_suspend()
234 const plat_local_state_t *pwr_domain_state = in tegra_soc_pwr_domain_power_down_wfi() local
235 target_state->pwr_domain_state; in tegra_soc_pwr_domain_power_down_wfi()
237 unsigned int stateid_afflvl2 = pwr_domain_state[PLAT_MAX_PWR_LVL] & in tegra_soc_pwr_domain_power_down_wfi()
278 int stateid_afflvl2 = target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]; in tegra_soc_pwr_domain_on_finish()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/
Dplat_pm.c19 ((state)->pwr_domain_state[MPIDR_AFFLVL0])
21 ((state)->pwr_domain_state[MPIDR_AFFLVL1])
23 ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
150 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in rockchip_validate_power_state()
154 req_state->pwr_domain_state[i] = in rockchip_validate_power_state()
158 req_state->pwr_domain_state[i] = in rockchip_validate_power_state()
174 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rockchip_get_sys_suspend_power_state()
229 lvl_state = target_state->pwr_domain_state[lvl]; in rockchip_pwr_domain_off()
265 lvl_state = target_state->pwr_domain_state[lvl]; in rockchip_pwr_domain_suspend()
286 lvl_state = target_state->pwr_domain_state[lvl]; in rockchip_pwr_domain_on_finish()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/drivers/scp/
Dcss_pm_scmi.c91 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in css_scp_suspend()
112 assert(target_state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] == in css_scp_suspend()
120 if (target_state->pwr_domain_state[lvl] == ARM_LOCAL_STATE_RUN) in css_scp_suspend()
123 assert(target_state->pwr_domain_state[lvl] == in css_scp_suspend()
156 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in css_scp_off()
160 assert(target_state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] == in css_scp_off()
164 if (target_state->pwr_domain_state[lvl] == ARM_LOCAL_STATE_RUN) in css_scp_off()
167 assert(target_state->pwr_domain_state[lvl] == in css_scp_off()
/device/linaro/bootloader/arm-trusted-firmware/include/plat/arm/css/common/
Dcss_pm.h18 #define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0]
19 #define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1]
22 (state)->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] : 0)
/device/linaro/bootloader/arm-trusted-firmware/plat/compat/
Dplat_pm_compat.c64 req_state->pwr_domain_state[0] = in parse_power_state()
68 req_state->pwr_domain_state[i] = in parse_power_state()
184 target_state->pwr_domain_state[level]) ? in pwr_domain_off_compat()
200 target_state->pwr_domain_state[level]) ? in pwr_domain_suspend_compat()
217 target_state->pwr_domain_state[level]) ? in pwr_domain_on_finish_compat()
235 target_state->pwr_domain_state[level]) ? in pwr_domain_suspend_finish_compat()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_pm.c23 ((state)->pwr_domain_state[MPIDR_AFFLVL0])
25 ((state)->pwr_domain_state[MPIDR_AFFLVL1])
27 ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
167 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey_get_sys_suspend_power_state()
234 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in hikey_validate_power_state()
238 req_state->pwr_domain_state[i] = in hikey_validate_power_state()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_pm.c23 ((state)->pwr_domain_state[MPIDR_AFFLVL0])
25 ((state)->pwr_domain_state[MPIDR_AFFLVL1])
27 ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
145 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in hikey960_validate_power_state()
149 req_state->pwr_domain_state[i] = in hikey960_validate_power_state()
280 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey960_get_sys_suspend_power_state()
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/
Dplat_pm.c35 #define MTK_CORE_PWR_STATE(state) (state)->pwr_domain_state[MTK_PWR_LVL0]
36 #define MTK_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[MTK_PWR_LVL1]
38 (state)->pwr_domain_state[MTK_PWR_LVL2] : 0)
557 assert(state->pwr_domain_state[MPIDR_AFFLVL0] == MTK_LOCAL_STATE_OFF); in plat_power_domain_on_finish()
560 (state->pwr_domain_state[MTK_PWR_LVL2] == MTK_LOCAL_STATE_OFF)) in plat_power_domain_on_finish()
563 if (state->pwr_domain_state[MPIDR_AFFLVL1] == MTK_LOCAL_STATE_OFF) { in plat_power_domain_on_finish()
569 (state->pwr_domain_state[MTK_PWR_LVL2] == MTK_LOCAL_STATE_OFF)) in plat_power_domain_on_finish()
619 if (state->pwr_domain_state[MTK_PWR_LVL0] == MTK_LOCAL_STATE_RET) in plat_power_domain_suspend_finish()
659 req_state->pwr_domain_state[i] = MTK_LOCAL_STATE_OFF; in plat_get_sys_suspend_power_state()
716 req_state->pwr_domain_state[MTK_PWR_LVL0] = in plat_validate_power_state()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/poplar/
Dplat_pm.c76 assert(target_state->pwr_domain_state[MPIDR_AFFLVL0] == in poplar_pwr_domain_on_finish()
120 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in poplar_validate_power_state()
122 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in poplar_validate_power_state()
148 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in poplar_get_sys_suspend_power_state()
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/
Dplat_psci_handlers.c53 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in tegra_soc_validate_power_state()
56 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = in tegra_soc_validate_power_state()
128 write_actlr_el1(target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]); in tegra_soc_pwr_domain_suspend()
/device/linaro/bootloader/arm-trusted-firmware/lib/psci/
Dpsci_common.c288 plat_local_state_t *pd_state = target_state->pwr_domain_state; in psci_get_target_local_pwr_states()
301 target_state->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN; in psci_get_target_local_pwr_states()
314 const plat_local_state_t *pd_state = target_state->pwr_domain_state; in psci_set_target_local_pwr_states()
413 state_info->pwr_domain_state[lvl]); in psci_do_state_coordination()
428 state_info->pwr_domain_state[lvl] = target_state; in psci_do_state_coordination()
431 if (is_local_state_run(state_info->pwr_domain_state[lvl])) in psci_do_state_coordination()
445 state_info->pwr_domain_state[lvl]); in psci_do_state_coordination()
446 state_info->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN; in psci_do_state_coordination()
482 state = state_info->pwr_domain_state[i]; in psci_validate_suspend_req()
526 if (is_local_state_off(state_info->pwr_domain_state[i])) in psci_find_max_off_lvl()
[all …]
Dpsci_stat.c85 if (is_local_state_run(state_info->pwr_domain_state[lvl])) in psci_stats_update_pwr_down()
116 local_state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL]; in psci_stats_update_pwr_up()
133 local_state = state_info->pwr_domain_state[lvl]; in psci_stats_update_pwr_up()
196 local_state = state_info.pwr_domain_state[pwrlvl]; in psci_get_stat()
Dpsci_off.c25 state_info->pwr_domain_state[lvl] = PLAT_MAX_OFF_STATE; in psci_set_power_off_state()
Dpsci_main.c92 cpu_pd_state = state_info.pwr_domain_state[PSCI_CPU_PWR_LVL]; in psci_cpu_suspend()
173 assert(is_local_state_off(state_info.pwr_domain_state[PLAT_MAX_PWR_LVL])); in psci_system_suspend()
Dpsci_suspend.c281 state_info->pwr_domain_state[PSCI_CPU_PWR_LVL])); in psci_cpu_suspend_finish()
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/
Darm_pm.c54 req_state->pwr_domain_state[ARM_PWR_LVL0] = in arm_validate_power_state()
58 req_state->pwr_domain_state[i] = in arm_validate_power_state()
104 req_state->pwr_domain_state[i++] = state_id & in arm_validate_power_state()
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_pm.c117 req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN; in tegra_get_sys_suspend_power_state()
171 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == in tegra_pwr_domain_suspend()
186 uint8_t pwr_state = target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]; in tegra_pwr_domain_power_down_wfi()
231 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == in tegra_pwr_domain_on_finish()
/device/linaro/bootloader/arm-trusted-firmware/plat/qemu/
Dqemu_pm.c90 req_state->pwr_domain_state[i++] = state_id & in qemu_validate_power_state()
171 assert(target_state->pwr_domain_state[MPIDR_AFFLVL0] == in qemu_pwr_domain_on_finish()
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/common/
Dcss_pm.c244 req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF; in css_get_sys_suspend_power_state()
271 req_state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] = ARM_LOCAL_STATE_RUN; in css_validate_power_state()
/device/linaro/bootloader/arm-trusted-firmware/include/lib/psci/
Dpsci.h253 plat_local_state_t pwr_domain_state[PLAT_MAX_PWR_LVL + U(1)]; member
298 int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state,
/device/linaro/bootloader/arm-trusted-firmware/plat/common/
Dplat_psci_common.c105 state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL]; in plat_psci_stat_get_residency()
/device/linaro/bootloader/arm-trusted-firmware/docs/
Dplatform-migration-guide.rst109 plat_local_state_t pwr_domain_state[PLAT_MAX_PWR_LVL + 1];
112 ``pwr_domain_state`` is an array where each index corresponds to a power level.
161 int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state,

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