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/device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/
Ddiv.asm34 RSBS r12, r1, r0, LSR #4
37 RSBS r12, r1, r0, LSR #8
52 ORRS r12, r0, r1
54 RSBS r12, r1, r0, LSR #1
57 RSBS r12, r1, r0, LSR #4
59 RSBS r12, r1, r0, LSR #8
64 RSBS r12, r1, r0, LSR #7
65 SUBCS r0, r0, r1, LSL #7
67 RSBS r12, r1, r0,LSR #6
68 SUBCS r0, r0, r1, LSL #6
[all …]
Ddiv.S35 rsbs r12, r1, r0, LSR #4
38 rsbs r12, r1, r0, LSR #8
53 orrs r12, r0, r1
55 rsbs r12, r1, r0, LSR #1
58 rsbs r12, r1, r0, LSR #4
60 rsbs r12, r1, r0, LSR #8
65 rsbs r12, r1, r0, LSR #7
66 subcs r0, r0, r1, LSL #7
68 rsbs r12, r1, r0,LSR #6
69 subcs r0, r0, r1, LSL #6
[all …]
Duread.asm28 ldrb r1, [r0]
32 orr r1, r1, r2, lsl #8
33 orr r1, r1, r3, lsl #16
34 orr r0, r1, r0, lsl #24
47 ldrb r1, [r3]
49 orr r1, r1, r2, lsl #8
51 orr r1, r1, r2, lsl #16
53 orr r0, r1, r0, lsl #24
55 ldrb r1, [r3, #4]
57 orr r1, r1, r2, lsl #8
[all …]
Dudivmoddi4.S28 mov r11, r1
30 subs ip, r1, #0
36 mov r1, r2
38 mov r1, #0
39 stmia r6, {r0-r1}
41 ldr r1, [sp, #0]
46 movne r1, #0
47 stmiane r6, {r0-r1}
50 ldr r1, [sp, #0]
51 cmp r1, #0
[all …]
Duldiv.S31 mov r4, r1
98 mov r1, #0 // 0x0
103 addeq r1, r1, #16 // 0x10
105 sub lr, r2, r1
110 addeq r1, r1, #8 // 0x8
112 rsb r0, r1, #32 // 0x20
113 sub r2, r2, r1
115 mov r5, r5, lsl r1
156 adc r1, r4, r4
157 add r1, r1, r3, lsl r6
[all …]
Duldiv.asm30 mov r4, r1
97 mov r1, #0 ; 0x0
102 addeq r1, r1, #16 ; 0x10
104 sub lr, r2, r1
109 addeq r1, r1, #8 ; 0x8
111 rsb r0, r1, #32 ; 0x20
112 sub r2, r2, r1
114 mov r5, r5, lsl r1
155 adc r1, r4, r4
156 add r1, r1, r3, lsl r6
[all …]
/device/linaro/bootloader/arm-trusted-firmware/drivers/arm/pl011/aarch32/
Dpl011_console.S42 cmp r1, #0
52 lsl r1, r1, #2
53 udiv r2, r1, r2
55 lsr r1, r2, #6
57 str r1, [r0, #UARTIBRD]
59 and r1, r2, #0x3f
61 str r1, [r0, #UARTFBRD]
62 mov r1, #PL011_LINE_CONTROL
63 str r1, [r0, #UARTLCR_H]
65 mov r1, #0
[all …]
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/
DCTA15-A7Helper.S27 and r1, r0, #ARM_CORE_MASK
29 add r0, r1, r0, LSR #7
39 MOV32 (r1, ARM_CTA15A7_SCC_CFGREG48)
40 ldr r1, [r1]
41 lsr r1, #24
44 lsl r2, r1, #4
48 and r1, r1, #0x0F
50 orr r1, r1, r2
57 cmp r0, r1
74 lsl r1, r0, #4
[all …]
DCTA15-A7Helper.asm37 and r1, r0, #ARM_CORE_MASK
39 add r0, r1, r0, LSR #7
50 mov32 r1, ARM_CTA15A7_SCC_CFGREG48
51 ldr r1, [r1]
52 lsr r1, #24
55 lsl r2, r1, #4
59 and r1, r1, #0x0F
61 orr r1, r1, r2
68 cmp r0, r1
86 lsl r1, r0, #4
[all …]
/device/linaro/bootloader/arm-trusted-firmware/lib/cpus/aarch32/
Dcortex_a57.S19 ldcopr16 r0, r1, CORTEX_A57_ECTLR
20 bic64_imm r0, r1, CORTEX_A57_ECTLR_SMP_BIT
21 stcopr16 r0, r1, CORTEX_A57_ECTLR
31 ldcopr16 r0, r1, CORTEX_A57_ECTLR
32 orr64_imm r0, r1, CORTEX_A57_ECTLR_DIS_TWD_ACC_PFTCH_BIT
33 bic64_imm r0, r1, (CORTEX_A57_ECTLR_L2_IPFTCH_DIST_MASK | \
35 stcopr16 r0, r1, CORTEX_A57_ECTLR
70 ldcopr16 r0, r1, CORTEX_A57_CPUACTLR
71 orr64_imm r0, r1, CORTEX_A57_CPUACTLR_NO_ALLOC_WBWA
72 stcopr16 r0, r1, CORTEX_A57_CPUACTLR
[all …]
Dcpu_helpers.S38 ldr r1, [r0, #CPU_RESET_FUNC]
39 cmp r1, #0
41 bxne r1
77 mov r1, #CPU_PWR_DWN_OPS
78 add r1, r1, r2, lsl #2
79 ldr r1, [r0, r1]
80 bx r1
93 ldr r1, [r0, #CPU_DATA_CPU_OPS_PTR]
94 cmp r1, #0
139 ldr r1, [r4], #CPU_OPS_SIZE
[all …]
Dcortex_a72.S18 ldcopr16 r0, r1, CORTEX_A72_ECTLR
19 orr64_imm r0, r1, CORTEX_A72_ECTLR_DIS_TWD_ACC_PFTCH_BIT
20 bic64_imm r0, r1, (CORTEX_A72_ECTLR_L2_IPFTCH_DIST_MASK | \
22 stcopr16 r0, r1, CORTEX_A72_ECTLR
32 ldcopr16 r0, r1, CORTEX_A72_CPUACTLR
33 orr64_imm r0, r1, CORTEX_A72_CPUACTLR_DISABLE_L1_DCACHE_HW_PFTCH
34 stcopr16 r0, r1, CORTEX_A72_CPUACTLR
46 ldcopr16 r0, r1, CORTEX_A72_ECTLR
47 bic64_imm r0, r1, CORTEX_A72_ECTLR_SMP_BIT
48 stcopr16 r0, r1, CORTEX_A72_ECTLR
[all …]
/device/linaro/bootloader/edk2/ArmPlatformPkg/PrePi/Arm/
DModuleEntryPoint.S29 mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)
30 msr CPSR_c, r1
36 ADRL (r1, mSystemMemoryEnd)
37 ldrd r2, r3, [r1]
39 moveq r1, r2
40 mvnne r1, #0
58 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
64 mov r1, r2
72 adds r9, r1, #1
76 mov r1, r9
[all …]
DModuleEntryPoint.asm44 mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)
45 msr CPSR_c, r1
51 adrll r1, mSystemMemoryEnd
52 ldrd r2, r3, [r1]
54 moveq r1, r2
55 mvnne r1, #0
74 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
80 mov r1, r2
88 adds r9, r1, #1
92 mov r1, r9
[all …]
/device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Arm/
DMath64.S26 mov r6, r1
29 subs r1, r2, #32
32 movpl r4, r0, asl r1
35 mov r1, r4
48 orr r3, r3, r1, asl ip
49 mov r4, r1, lsr r2
50 movpl r3, r1, lsr r0
51 mov r6, r1
53 mov r1, r4
66 orr r3, r3, r1, asl ip
[all …]
/device/linaro/bootloader/edk2/ArmVirtPkg/PrePi/Arm/
DModuleEntryPoint.S45 add r9, r9, r1 // add image base to addend to get relocated value
63 LDRL (r1, PcdGet64 (PcdSystemMemoryBase))
68 adds r2, r2, r1
74 movne r1, #-1
75 moveq r1, r2
90 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
96 mov r1, r2
104 adds r11, r1, #1
108 mov r1, r11
115 and r1, r1, r11
[all …]
/device/google/contexthub/firmware/lib/libc/
Dmemcpy-armv7m.S91 @ r1: src
100 orr r3, r1, r0
113 ldr r3, [r1], #4
117 ldr r3, [r1, \offset]
121 adds r1, __OPT_BIG_BLOCK_SIZE
135 ldr r3, [r1], #4
139 ldr r3, [r1, \offset]
143 adds r1, __OPT_MID_BLOCK_SIZE
155 ldr r3, [r1], #4
166 ldrbne r3, [r1], #1
[all …]
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/
DRTSMHelper.asm58 stmfd SP!, {r1-r2}
61 mrc p15, 0, r1, c0, c0, 0
64 mov r1, r1, LSR #4
66 and r1, r1, r0
69 cmp r1, r0
88 ldmfd SP!, {r1-r2}
97 mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
98 and r0, r0, r1
99 mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
100 ldr r1, [r1]
[all …]
/device/linaro/bootloader/edk2/MdePkg/Library/BaseSynchronizationLib/Arm/
DSynchronization.asm53 cmp r3, r1
95 cmp r3, r1
150 mov r1, r7
175 ldrex r1, [r0]
176 add r1, r1, #1
177 strex r2, r1, [r0]
181 mov r0, r1
205 ldrex r1, [r0]
206 sub r1, r1, #1
207 strex r2, r1, [r0]
[all …]
DSynchronization.S54 cmp r3, r1
96 cmp r3, r1
151 mov r1, r7
176 ldrex r1, [r0]
177 add r1, r1, #1
178 strex r2, r1, [r0]
182 mov r0, r1
206 ldrex r1, [r0]
207 sub r1, r1, #1
208 strex r2, r1, [r0]
[all …]
/device/linaro/bootloader/edk2/MdePkg/Library/BaseMemoryLibOptDxe/Arm/
DSetMem.S22 lsl r1, r1, #1
28 lsl r1, r1, #2
33 lsl r1, r1, #3
50 cmp r1, #16 // fewer than 16 bytes of input?
51 add r1, r1, r0 // r1 := dst + length
63 subs r4, r1, lr // past the output?
70 2: subs r4, r1, lr
72 subs r1, r1, #8
81 strgt.n r2, [r1]
82 str r3, [r1, #4]
[all …]
DSetMem.asm26 lsl r1, r1, #1
31 lsl r1, r1, #2
35 lsl r1, r1, #3
52 cmp r1, #16 ; fewer than 16 bytes of input?
53 add r1, r1, r0 ; r1 := dst + length
66 subs r4, r1, lr ; past the output?
75 subs r4, r1, lr
78 subs r1, r1, #8
85 strgt r2, [r1]
86 str r3, [r1, #4]
[all …]
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/
DArmJunoHelper.S32 and r1, r0, #ARM_CORE_MASK
34 add r0, r1, r0, LSR #7
67 MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
68 and r0, r0, r1
70 LDRL (r1, PrimaryCoreMpid)
72 cmp r0, r1
87 adr r1, PrimaryCoreMpid
88 str r0, [r1]
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/common/aarch32/
Dcss_helpers.S57 and r1, r0, #MPIDR_CPU_MASK
60 add r0, r1, r0, LSR #6
78 mov r1, #0xffffffff
79 cmp r0, r1
92 ldr r1, =SCP_BOOT_CFG_ADDR
93 ldr r1, [r1]
94 ubfx r1, r1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \
96 cmp r0, r1
/device/linaro/bootloader/arm-trusted-firmware/lib/psci/aarch32/
Dpsci_helpers.S80 mov r1, sp
81 sub r1, r0, r1
109 ldcopr r1, SCTLR
110 bic r1, #SCTLR_C_BIT
111 stcopr r1, SCTLR
120 mov r1, sp
121 sub r1, r0, r1
132 sub r1, sp, r0

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