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/device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/
Duldiv.S30 stmdb sp!, {r4, r5, r6, lr}
32 mov r5, r0
93 orrs r0, r4, r5, lsr #30
94 moveq r4, r5
95 moveq r5, #0 // 0x0
114 orr r4, r4, r5, lsr r0
115 mov r5, r5, lsl r1
125 adcs r5, r5, r5
128 adcs r5, r5, r5
131 adcs r5, r5, r5
[all …]
Duldiv.asm29 stmdb sp!, {r4, r5, r6, lr}
31 mov r5, r0
92 orrs r0, r4, r5, lsr #30
93 moveq r4, r5
94 moveq r5, #0 ; 0x0
113 orr r4, r4, r5, lsr r0
114 mov r5, r5, lsl r1
124 adcs r5, r5, r5
127 adcs r5, r5, r5
130 adcs r5, r5, r5
[all …]
Dmuldi3.S18 stmfd sp!, {r4, r5, r6, r7, lr}
35 mov r5, r10, lsr #16
41 add ip, r5, r10, lsr #16
42 ldr r5, [sp, #4]
44 mla r5, r6, r5, ip
46 add r11, r0, r5
51 ldmfd sp!, {r4, r5, r6, r7, pc}
Dudivsi3.S22 stmfd sp!, {r4, r5, r7, lr}
30 ldmfdeq sp!, {r4, r5, r7, pc}
31 add r5, r3, #1
35 mov ip, r0, lsr r5
49 cmp r4, r5
53 ldmfd sp!, {r4, r5, r7, pc}
56 ldmfd sp!, {r4, r5, r7, pc}
Dsourcery.S21 stmfd sp!, {r4, r5, r8}
26 mov r5, r3
31 ldmfd sp!, {r4, r5, r8}
36 cmp r9, r5
41 cmpeq r9, r5
Dudivmoddi4.S20 stmfd sp!, {r4, r5, r6, r7, lr}
81 mov r5, r0
82 stmia r6, {r4-r5}
90 andne r5, ip, r3
91 stmiane r6, {r4-r5}
111 mov r5, ip, lsr lr
162 and r5, r3, r2, asr #31
192 and r5, r3, r2, asr #31
201 orr r5, r3, r5, asl #1
210 sbc r3, r3, r5
[all …]
Dmodsi3.S18 stmfd sp!, {r4, r5, r7, lr}
20 mov r5, r0
24 rsb r0, r0, r5
25 ldmfd sp!, {r4, r5, r7, pc}
Dumodsi3.S18 stmfd sp!, {r4, r5, r7, lr}
20 mov r5, r0
24 rsb r0, r0, r5
25 ldmfd sp!, {r4, r5, r7, pc}
Dmoddi3.S18 stmfd sp!, {r4, r5, r7, lr}
24 mov r5, r4
32 sbc r1, r1, r5
41 sbc r1, r1, r5
44 ldmfd sp!, {r4, r5, r7, pc}
Ddivsi3.S20 stmfd sp!, {r4, r5, r7, lr}
21 mov r5, r0, asr #31
27 eor r1, r5, r4
30 ldmfd sp!, {r4, r5, r7, pc}
Ddivdi3.S20 stmfd sp!, {r4, r5, r7, lr}
27 mov r5, r4
33 sbc r3, r3, r5
47 ldmfd sp!, {r4, r5, r7, pc}
Ducmpdi2.S18 stmfd sp!, {r4, r5, r8, lr}
22 mov r5, r3
36 ldmfd sp!, {r4, r5, r8, pc}
/device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Arm/
DMath64.S25 stmfd sp!, {r4, r5, r6}
33 mov r5, r0
36 ldmfd sp!, {r4, r5, r6}
43 stmfd sp!, {r4, r5, r6}
44 mov r5, r0
46 mov r3, r5, lsr r2
54 ldmfd sp!, {r4, r5, r6}
61 stmfd sp!, {r4, r5, r6}
62 mov r5, r0
64 mov r3, r5, lsr r2
[all …]
/device/linaro/bootloader/edk2/MdePkg/Library/BaseMemoryLibOptDxe/Arm/
DScanMem.S90 ldmia r0!, {r5,r6}
92 eor r5, r5, r2 // Get it so that r5,r6 have 00's where the bytes match the target
94 uadd8 r5, r5, r7 // Parallel add 0xff - sets the GE bits for anything that wasn't 0
95 sel r5, r3, r7 // bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
97 …sel r6, r5, r7 // chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVE…
127 cmp r5, #0
129 moveq.n r5, r6 // the end is in the 2nd word
134 tst r5, #CHARTSTMASK(0) // 1st character
137 tst r5, #CHARTSTMASK(1) // 2nd character
140 tst r5, #(3 << 15) // 2nd & 3rd character
DScanMem.asm92 uadd8 r5, r5, r7 ; Parallel add 0xff - sets the GE bits for anything that wasn't 0
95 …sel r6, r5, r7 ; chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVER…
123 ; r5 has the 00/ff pattern for the first word, r6 has the chained value
124 cmp r5, #0
126 moveq r5, r6 ; the end is in the 2nd word
131 tst r5, #CHARTSTMASK(0) ; 1st character
134 tst r5, #CHARTSTMASK(1) ; 2nd character
137 tsteq r5, #(3 << 15) ; 2nd & 3rd character
/device/linaro/bootloader/arm-trusted-firmware/common/aarch32/
Ddebug.S92 mov r5, r0
103 mov r4, r5
118 ldr r5, =MAX_DEC_DIVISOR
120 udiv r0, r4, r5 /* Quotient */
121 mls r4, r0, r5, r4 /* Remainder */
124 udiv r5, r5, r6 /* Reduce divisor */
125 cmp r5, #0
159 mov r5, #32 /* No of bits to convert to ascii */
161 sub r5, r5, #4
162 lsr r0, r4, r5
[all …]
/device/linaro/bootloader/edk2/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/
DArmPlatformStackLib.S26 mov r5, r2
41 mov r2, r5
86 mov r5, r0
93 cmp r5, r0
94 subhi r5, r5, #1
95 add r5, r5, #1
98 mul r3, r3, r5
DArmPlatformStackLib.asm41 mov r5, r2
56 mov r2, r5
104 mov r5, r0
111 cmp r5, r0
112 subhi r5, r5, #1
113 add r5, r5, #1
116 mul r3, r3, r5
/device/linaro/hikey/l-loader/
Dstart.S46 ldr r5, =CPU0_RVBARADDR_OFFSET
49 str r6, [r4, r5]
51 ldr r0, [r4, r5]
55 mov r5, #CPU0_CTRL_OFFSET
58 ldr r0, [r4, r5] @ Load ACPU_SC_CPUx_CTRL
60 str r0, [r4, r5] @ Save to ACPU_SC_CPUx_CTRL
61 ldr r0, [r4, r5]
63 add r5, r5, #0x100 @ Iterate ACPU_SC_CPUx_CTRL
64 cmp r5, r6
86 ldr r5, =SC_PERIPH_RSTDIS3 @ unreset
[all …]
/device/linaro/bootloader/edk2/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/
DRelocatableVirtHelper.S50 ldr r5, [r7]
51 sub r5, r5, r6
52 add r5, r5, r1
54 str r5, [r7]
64 mov sp, r5
/device/linaro/bootloader/edk2/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/
DRelocatableVirtHelper.S51 ldr r5, [r7]
52 sub r5, r5, r6
53 add r5, r5, r1
55 str r5, [r7]
65 mov sp, r5
/device/linaro/bootloader/edk2/ArmPlatformPkg/PrePeiCore/Arm/
DPrePeiCoreEntryPoint.S23 mov r5, r0
40 mov r0, r5
63 mov r0, r5
DPrePeiCoreEntryPoint.asm37 mov r5, r0
54 mov r0, r5
77 mov r0, r5
/device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/
Dsmcc_macros.S27 mrs r5, lr_usr
38 mrs r5, lr_svc
87 msr lr_usr, r5
98 msr lr_svc, r5
/device/linaro/bootloader/arm-trusted-firmware/bl1/aarch32/
Dbl1_entrypoint.S81 ldr r5, [r4, #SMC_CTX_SCR]
82 tst r5, #SCR_NS_BIT

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