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Searched refs:reg (Results 1 – 25 of 137) sorted by relevance

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/device/linaro/bootloader/edk2/MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/
Dregcomp.c205 add_opcode(regex_t* reg, int opcode) in add_opcode() argument
207 BBUF_ADD1(reg, ((unsigned char)opcode)); in add_opcode()
213 add_state_check_num(regex_t* reg, int num) in add_state_check_num() argument
217 BBUF_ADD(reg, &n, SIZE_STATE_CHECK_NUM); in add_state_check_num()
223 add_rel_addr(regex_t* reg, int addr) in add_rel_addr() argument
227 BBUF_ADD(reg, &ra, SIZE_RELADDR); in add_rel_addr()
232 add_abs_addr(regex_t* reg, int addr) in add_abs_addr() argument
236 BBUF_ADD(reg, &ra, SIZE_ABSADDR); in add_abs_addr()
241 add_length(regex_t* reg, int len) in add_length() argument
245 BBUF_ADD(reg, &l, SIZE_LENGTH); in add_length()
[all …]
Dregposix.c37 #define ONIG_C(reg) ((onig_regex_t* )((reg)->onig)) argument
38 #define PONIG_C(reg) ((onig_regex_t** )(&(reg)->onig)) argument
136 regcomp(regex_t* reg, const char* pattern, int posix_options) in regcomp() argument
153 reg->comp_options = posix_options; in regcomp()
156 r = onig_new(PONIG_C(reg), (UChar* )pattern, (UChar* )(pattern + len), in regcomp()
163 reg->re_nsub = ONIG_C(reg)->num_mem; in regcomp()
168 regexec(regex_t* reg, const char* str, size_t nmatch, in regexec() argument
180 if (nmatch == 0 || (reg->comp_options & REG_NOSUB) != 0) { in regexec()
184 else if ((int )nmatch < ONIG_C(reg)->num_mem + 1) { in regexec()
186 * (ONIG_C(reg)->num_mem + 1)); in regexec()
[all …]
Dreggnu.c46 re_adjust_startpos(regex_t* reg, const char* string, int size, in re_adjust_startpos() argument
49 if (startpos > 0 && ONIGENC_MBC_MAXLEN(reg->enc) != 1 && startpos < size) { in re_adjust_startpos()
54 p = onigenc_get_right_adjust_char_head(reg->enc, (UChar* )string, s); in re_adjust_startpos()
57 p = ONIGENC_LEFT_ADJUST_CHAR_HEAD(reg->enc, (UChar* )string, s); in re_adjust_startpos()
66 re_match(regex_t* reg, const char* str, int size, int pos, in re_match() argument
69 return onig_match(reg, (UChar* )str, (UChar* )(str + size), in re_match()
84 re_compile_pattern(const char* pattern, int size, regex_t* reg, char* ebuf) in re_compile_pattern() argument
89 r = onig_compile(reg, (UChar* )pattern, (UChar* )(pattern + size), &einfo); in re_compile_pattern()
100 re_recompile_pattern(const char* pattern, int size, regex_t* reg, char* ebuf) in re_recompile_pattern() argument
111 r = onig_recompile(reg, (UChar* )pattern, (UChar* )(pattern + size), in re_recompile_pattern()
[all …]
Dregexec.c850 #define STACK_NULL_CHECK_MEMST(isnull,id,s,reg) do {\ argument
869 if (BIT_STATUS_AT(reg->bt_mem_end, k->u.mem.num))\
889 #define STACK_NULL_CHECK_MEMST_REC(isnull,id,s,reg) do {\ argument
910 if (BIT_STATUS_AT(reg->bt_mem_end, k->u.mem.num))\
1047 OnigStackType* stk_top, UChar* str, regex_t* reg) in make_capture_history_tree() argument
1057 BIT_STATUS_AT(reg->capture_history, n) != 0) { in make_capture_history_tree()
1065 r = make_capture_history_tree(child, kp, stk_top, str, reg); in make_capture_history_tree()
1099 static int backref_match_at_nested_level(regex_t* reg in backref_match_at_nested_level() argument
1128 if (string_cmp_ic(reg->enc, case_fold_flag, in backref_match_at_nested_level()
1247 match_at(regex_t* reg, const UChar* str, const UChar* end, in match_at() argument
[all …]
Donigposix.h154 ONIG_EXTERN int regcomp P_((regex_t* reg, const char* pat, int options));
155 ONIG_EXTERN int regexec P_((regex_t* reg, const char* str, size_t nmatch, regmatch_t* matches, i…
156 ONIG_EXTERN void regfree P_((regex_t* reg));
157 ONIG_EXTERN size_t regerror P_((int code, const regex_t* reg, char* buf, size_t size));
161 ONIG_EXTERN int reg_name_to_group_numbers P_((regex_t* reg, const unsigned char* name, const unsig…
162 ONIG_EXTERN int reg_foreach_name P_((regex_t* reg, int (*func)(const unsigned char*, const unsigne…
163 ONIG_EXTERN int reg_number_of_names P_((regex_t* reg));
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
Dmeminit_utils.c50 uint32_t reg; in set_rcvn() local
60 reg = B01PTRCTL0 + ((byte_lane >> 1) * DDRIODQ_BL_OFFSET) + (channel * DDRIODQ_CH_OFFSET); in set_rcvn()
63 isbM32m(DDRPHY, reg, tempD, msk); in set_rcvn()
71 reg = (byte_lane & BIT0) ? (B1DLLPICODER0) : (B0DLLPICODER0); in set_rcvn()
72 reg += (((byte_lane >> 1) * DDRIODQ_BL_OFFSET) + (channel * DDRIODQ_CH_OFFSET)); in set_rcvn()
75 isbM32m(DDRPHY, reg, tempD, msk); in set_rcvn()
80 reg = B01DBCTL1 + ((byte_lane >> 1) * DDRIODQ_BL_OFFSET) + (channel * DDRIODQ_CH_OFFSET); in set_rcvn()
95 isbM32m(DDRPHY, reg, tempD, msk); in set_rcvn()
117 uint32_t reg; in get_rcvn() local
126 reg = B01PTRCTL0 + ((byte_lane >> 1) * DDRIODQ_BL_OFFSET) + (channel * DDRIODQ_CH_OFFSET); in get_rcvn()
[all …]
/device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/DeviceTree/
Dhi6220-coresight.dtsi19 reg = <0 0xf6401000 0 0x1000>;
28 reg = <0>;
36 reg = <0>;
48 reg = <0 0xf6402000 0 0x1000>;
57 reg = <0>;
66 reg = <0>;
85 reg = <0>;
94 reg = <0>;
102 reg = <1>;
113 reg = <0 0xf6404000 0 0x1000>;
[all …]
Dhi6220.dtsi86 reg = <0x0 0x0>;
101 reg = <0x0 0x1>;
111 reg = <0x0 0x2>;
121 reg = <0x0 0x3>;
131 reg = <0x0 0x100>;
141 reg = <0x0 0x101>;
151 reg = <0x0 0x102>;
161 reg = <0x0 0x103>;
210 reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
237 reg = <0x0 0xfff80000 0x0 0x12000>;
[all …]
Dhi3660.dtsi60 reg = <0x0 0x0>;
70 reg = <0x0 0x1>;
80 reg = <0x0 0x2>;
90 reg = <0x0 0x3>;
100 reg = <0x0 0x100>;
114 reg = <0x0 0x101>;
128 reg = <0x0 0x102>;
142 reg = <0x0 0x103>;
203 reg = <0x0 0xe82b1000 0 0x1000>, /* GICD */
259 reg = <0x0 0xfff35000 0x0 0x1000>;
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
Dhisi_pwrc.c41 unsigned int reg = 0; in hisi_pwrc_set_cluster_wfi() local
44 reg = mmio_read_32(ACPU_SC_SNOOP_PWD); in hisi_pwrc_set_cluster_wfi()
45 reg |= PD_DETECT_START0; in hisi_pwrc_set_cluster_wfi()
46 mmio_write_32(ACPU_SC_SNOOP_PWD, reg); in hisi_pwrc_set_cluster_wfi()
48 reg = mmio_read_32(ACPU_SC_SNOOP_PWD); in hisi_pwrc_set_cluster_wfi()
49 reg |= PD_DETECT_START1; in hisi_pwrc_set_cluster_wfi()
50 mmio_write_32(ACPU_SC_SNOOP_PWD, reg); in hisi_pwrc_set_cluster_wfi()
71 unsigned int reg, sec_entrypoint; in hisi_pwrc_setup() local
92 reg = mmio_read_32(AO_SC_SYS_CTRL1); in hisi_pwrc_setup()
94 reg |= AO_SC_SYS_CTRL1_REMAP_SRAM_AARM | in hisi_pwrc_setup()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/fdts/
Dfvp-base-gicv3-psci-1t.dts12 reg = <0x0 0x0>;
16 reg = <0x0 0x100>;
20 reg = <0x0 0x200>;
24 reg = <0x0 0x300>;
28 reg = <0x0 0x10000>;
32 reg = <0x0 0x10100>;
36 reg = <0x0 0x10200>;
40 reg = <0x0 0x10300>;
Drtsm_ve-motherboard.dtsi16 reg = <0 0x00000000 0x04000000>,
23 reg = <2 0x00000000 0x00800000>;
28 reg = <2 0x02000000 0x10000>;
61 reg = <0x010000 0x1000>;
68 reg = <0x020000 0x1000>;
77 reg = <0x040000 0x1000>;
85 reg = <0x050000 0x1000>;
97 reg = <0x060000 0x1000>;
105 reg = <0x070000 0x1000>;
113 reg = <0x090000 0x1000>;
[all …]
Dfvp-foundation-motherboard.dtsi16 reg = <2 0x02000000 0x10000>;
49 reg = <0x010000 0x1000>;
56 reg = <0x020000 0x1000>;
65 reg = <0x090000 0x1000>;
73 reg = <0x0a0000 0x1000>;
81 reg = <0x0b0000 0x1000>;
89 reg = <0x0c0000 0x1000>;
97 reg = <0x0f0000 0x1000>;
105 reg = <0x110000 0x1000>;
113 reg = <0x120000 0x1000>;
[all …]
Dfvp-base-gicv3-psci-common.dtsi99 reg = <0x0 0x0>;
108 reg = <0x0 0x1>;
117 reg = <0x0 0x2>;
126 reg = <0x0 0x3>;
135 reg = <0x0 0x100>;
144 reg = <0x0 0x101>;
153 reg = <0x0 0x102>;
162 reg = <0x0 0x103>;
175 reg = <0x00000000 0x80000000 0 0x7F000000>,
186 reg = <0x0 0x2f000000 0 0x10000>, // GICD
[all …]
Dfvp-base-gicv2-psci.dts101 reg = <0x0 0x0>;
110 reg = <0x0 0x1>;
119 reg = <0x0 0x2>;
128 reg = <0x0 0x3>;
137 reg = <0x0 0x100>;
146 reg = <0x0 0x101>;
155 reg = <0x0 0x102>;
164 reg = <0x0 0x103>;
177 reg = <0x00000000 0x80000000 0 0x7F000000>,
186 reg = <0x0 0x2f000000 0 0x10000>,
[all …]
Dfvp-base-gicv3-psci-aarch32.dts101 reg = <0x0>;
110 reg = <0x1>;
119 reg = <0x2>;
128 reg = <0x3>;
137 reg = <0x100>;
146 reg = <0x101>;
155 reg = <0x102>;
164 reg = <0x103>;
177 reg = <0x00000000 0x80000000 0 0x7F000000>,
188 reg = <0x0 0x2f000000 0 0x10000>, // GICD
[all …]
/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
De1000phy.c239 UINT16 reg; in e1000phy_reset() local
245 reg = PHY_READ (sc_phy, E1000_SCR); in e1000phy_reset()
247 reg &= ~E1000_SCR_AUTO_X_MODE; in e1000phy_reset()
248 PHY_WRITE (sc_phy, E1000_SCR, reg); in e1000phy_reset()
253 reg = PHY_READ (sc_phy, E1000_SCR); in e1000phy_reset()
254 reg &= ~E1000_SCR_MODE_MASK; in e1000phy_reset()
255 reg |= E1000_SCR_MODE_1000BX; in e1000phy_reset()
256 PHY_WRITE (sc_phy, E1000_SCR, reg); in e1000phy_reset()
260 reg = PHY_READ (sc_phy, E1000_SCR); in e1000phy_reset()
261 reg |= E1000_SCR_FIB_SIGDET_POLARITY; in e1000phy_reset()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/drivers/sds/
Dsds_private.h67 uint32_t reg[2]; member
71 ((((struct_header_t *)(header))->reg[0]) & SDS_HEADER_ID_MASK)
73 (((((struct_header_t *)(header))->reg[0]) >> SDS_HEADER_MINOR_VERSION_SHIFT)\
76 (((((struct_header_t *)(header))->reg[1]) >> SDS_HEADER_STRUCT_SIZE_SHIFT)\
79 ((((struct_header_t *)(header))->reg[1]) & SDS_HEADER_VALID_MASK)
85 uint32_t reg[2]; member
89 (((((region_desc_t *)(region))->reg[0]) & SDS_REGION_SIGNATURE_MASK) == SDS_REGION_SIGNATURE)
91 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_STRUCT_COUNT_SHIFT)\
94 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_SCH_MINOR_SHIFT)\
96 #define GET_SDS_REGION_SIZE(region) ((((region_desc_t *)(region))->reg[1]))
/device/linaro/bootloader/arm-trusted-firmware/include/common/aarch32/
Dasm_macros.S18 .macro ldcopr reg, coproc, opc1, CRn, CRm, opc2
19 mrc \coproc, \opc1, \reg, \CRn, \CRm, \opc2
26 .macro stcopr reg, coproc, opc1, CRn, CRm, opc2
27 mcr \coproc, \opc1, \reg, \CRn, \CRm, \opc2
35 .macro dcache_line_size reg, tmp
38 mov \reg, #WORD_SIZE
39 lsl \reg, \reg, \tmp
42 .macro icache_line_size reg, tmp
45 mov \reg, #WORD_SIZE
46 lsl \reg, \reg, \tmp
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Include/
DEfiPciCfg.h37 #define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \ argument
38 … (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \
52 #define EFI_PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) \ argument
56 ((reg) < 256 ? ((UINTN) (reg)): ((UINT64) (reg) << 32)))
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Drivers/IoInitDxe/
DSmmu.c340 UINT32 reg; in SmmuConfigSwitch() local
363 reg = CBAR_TYPE_S1_TRANS_S2_BYPASS | in SmmuConfigSwitch()
366 MmioWrite32 (Smmu->S2Cbt + SMMU_CB_CBAR(SMMU_OS_VMID), reg); in SmmuConfigSwitch()
369 reg = S2CR_TYPE_TRANS | S2CR_MTSH_WEAKEST; in SmmuConfigSwitch()
370 MmioWrite32 (Smmu->S2Cbt + SMMU_CB_S2CR(SMMU_OS_VMID), reg); in SmmuConfigSwitch()
373 reg = S2CR_TYPE_BYPASS; in SmmuConfigSwitch()
374 MmioWrite32 (Smmu->S2Cbt + SMMU_CB_S2CR(hisi_bypass_vmid), reg); in SmmuConfigSwitch()
408 UINT32 reg; in SmmuEnableTable() local
414 reg = readl_relaxed(gr0_base + SMMU_RINT_GFSR); in SmmuEnableTable()
415 writel_relaxed(reg, gr0_base + SMMU_RINT_GFSR); in SmmuEnableTable()
[all …]
/device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/VExpress/DeviceTree/
Drtsm_ve-motherboard-no_psci.dtsi41 reg = <0 0x00000000 0x04000000>,
48 reg = <2 0x00000000 0x00800000>;
53 reg = <2 0x02000000 0x10000>;
86 reg = <0x010000 0x1000>;
93 reg = <0x020000 0x1000>;
102 reg = <0x040000 0x1000>;
110 reg = <0x050000 0x1000>;
122 reg = <0x060000 0x1000>;
130 reg = <0x070000 0x1000>;
138 reg = <0x090000 0x1000>;
[all …]
Drtsm_ve-motherboard.dtsi41 reg = <0 0x00000000 0x04000000>,
48 reg = <2 0x00000000 0x00800000>;
53 reg = <2 0x02000000 0x10000>;
86 reg = <0x010000 0x1000>;
93 reg = <0x020000 0x1000>;
102 reg = <0x040000 0x1000>;
110 reg = <0x050000 0x1000>;
122 reg = <0x060000 0x1000>;
130 reg = <0x070000 0x1000>;
138 reg = <0x090000 0x1000>;
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/common/aarch64/
Dasm_macros.S24 .macro dcache_line_size reg, tmp
27 mov \reg, #4
28 lsl \reg, \reg, \tmp
32 .macro icache_line_size reg, tmp
35 mov \reg, #4
36 lsl \reg, \reg, \tmp
/device/linaro/hikey/hifi/xaf/hifi-dpf/core/util/gdbstub/
Dgdbstub-entry.S24 .macro SAVE_ reg, loc
25 rsr a1, \reg
28 .macro SAVE reg argument
29 SAVE_ \reg, \reg
32 .macro LOAD_ reg, loc
34 wsr a1, \reg
36 .macro LOAD reg argument
37 LOAD_ \reg, \reg

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