| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | fmf-propagation.ll | 17 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract1:'
40 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract2:'
63 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_reassoc1:'
86 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_reassoc2:'
109 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast1:'
132 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast2:'
156 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc1:'
160 ; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc1:'
187 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc2:'
191 ; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc2:'
[all …]
|
| D | combine_loads_from_build_pair.ll | 7 ; between "Initial selection DAG" and "Optimized lowered selection DAG".
19 ; CHECK-LABEL: Optimized lowered selection DAG:
|
| /external/epid-sdk/ext/ipp/sources/include/ |
| D | ippres.gen | 147 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for Intel(R) Pen…
153 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
159 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
165 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
171 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
177 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
183 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
189 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
195 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for Intel(R) 64 …
201 …", "Intel(R) Integrated Performance Primitives. " IPP_LIB_LONGNAME() ". Optimized for processors w…
[all …]
|
| /external/libyuv/files/ |
| D | README.md | 7 * Optimized for SSE2/SSSE3/AVX2 on x86/x64.
8 * Optimized for Neon on Arm.
9 * Optimized for DSP R2 on Mips.
|
| /external/compiler-rt/make/ |
| D | lib_util.mk | 31 $(if $(and $(call streq,Optimized,$($(key).Implementation)),\
36 $(if $(and $(call streq,Optimized,$($(key).Implementation)),\
40 $(if $(and $(call streq,Optimized,$($(key).Implementation)),\
|
| /external/swiftshader/third_party/LLVM/utils/release/ |
| D | test-release.sh | 191 Optimized="yes"
195 Optimized="yes"
199 Optimized="no"
215 --enable-optimized=$Optimized \
219 --enable-optimized=$Optimized \
|
| /external/llvm/include/llvm/CodeGen/ |
| D | TargetPassConfig.h | 303 virtual FunctionPass *createTargetRegisterAllocator(bool Optimized);
371 FunctionPass *createRegAllocPass(bool Optimized);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetPassConfig.h | 353 virtual FunctionPass *createTargetRegisterAllocator(bool Optimized);
428 FunctionPass *createRegAllocPass(bool Optimized);
|
| /external/compiler-rt/lib/builtins/arm64/ |
| D | Makefile.mk | 17 Implementation := Optimized
|
| /external/compiler-rt/lib/builtins/i386/ |
| D | Makefile.mk | 17 Implementation := Optimized
|
| /external/compiler-rt/lib/builtins/armv6m/ |
| D | Makefile.mk | 17 Implementation := Optimized
|
| /external/compiler-rt/lib/builtins/ppc/ |
| D | Makefile.mk | 17 Implementation := Optimized
|
| /external/compiler-rt/lib/builtins/x86_64/ |
| D | Makefile.mk | 17 Implementation := Optimized
|
| /external/compiler-rt/lib/builtins/arm/ |
| D | Makefile.mk | 17 Implementation := Optimized
|
| /external/compiler-rt/test/builtins/Unit/ppc/ |
| D | test | 2 if gcc -arch ppc -O0 $FILE ../../../Release/ppc/libcompiler_rt.Optimized.a -mlong-double-128
|
| /external/arm-optimized-routines/ |
| D | METADATA | 2 description: "Optimized implementations of various library functions for ARM architecture processor…
|
| /external/llvm/bindings/go/llvm/ |
| D | dibuilder.go | 118 Optimized bool member
138 boolToCInt(cu.Optimized),
191 Optimized bool member
212 boolToCInt(f.Optimized),
|
| D | DIBuilderBindings.cpp | 40 int Optimized, const char *Flags, in LLVMDIBuilderCreateCompileUnit() argument
43 return wrap(D->createCompileUnit(Lang, File, Dir, Producer, Optimized, Flags, in LLVMDIBuilderCreateCompileUnit()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetPassConfig.cpp | 752 FunctionPass *TargetPassConfig::createTargetRegisterAllocator(bool Optimized) { in createTargetRegisterAllocator() argument
753 if (Optimized) in createTargetRegisterAllocator()
768 FunctionPass *TargetPassConfig::createRegAllocPass(bool Optimized) { in createRegAllocPass() argument
778 return createTargetRegisterAllocator(Optimized); in createRegAllocPass()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/bindings/go/llvm/ |
| D | dibuilder.go | 118 Optimized bool member
138 C.LLVMBool(boolToCInt(cu.Optimized)),
198 Optimized bool member
219 C.LLVMBool(boolToCInt(f.Optimized)),
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonIntrinsicsDerived.td | 12 // Optimized with intrinisics accumulates
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
| D | MemorySSA.h | 296 void setDefiningAccess(MemoryAccess *DMA, bool Optimized = false,
298 if (!Optimized) {
394 Optimized = MA;
399 return cast_or_null<MemoryAccess>(Optimized);
420 WeakVH Optimized;
|
| /external/libpng/ |
| D | README | 184 arm-neon => Optimized code for ARM-NEON platform
185 powerpc-vsx => Optimized code for POWERPC-VSX platform
191 mips-msa => Optimized code for MIPS-MSA platform
199 intel => Optimized code for INTEL-SSE2 platform
200 mips => Optimized code for MIPS platform
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | cmpb-dec-imm.ll | 5 ; The "Optimized Lowered Selection" converts the "ugt with #40" to
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetPassConfig.cpp | 1012 FunctionPass *TargetPassConfig::createTargetRegisterAllocator(bool Optimized) { in createTargetRegisterAllocator() argument
1013 if (Optimized) in createTargetRegisterAllocator()
1028 FunctionPass *TargetPassConfig::createRegAllocPass(bool Optimized) { in createRegAllocPass() argument
1038 return createTargetRegisterAllocator(Optimized); in createRegAllocPass()
|