/external/llvm/test/Analysis/BlockFrequencyInfo/ |
D | irreducible_loop_crash.ll | 12 for.inc: 17 br i1 %tobool7, label %for.inc.9, label %for.inc 19 for.inc.9: ; preds = %for.body.5 20 br i1 %tobool7, label %for.inc.9.1, label %for.inc 23 br i1 undef, label %for.end.17, label %for.inc 28 for.inc.9.1: ; preds = %for.inc.9 29 br i1 %tobool7, label %for.inc.9.2, label %for.inc 31 for.inc.9.2: ; preds = %for.inc.9.1 32 br i1 %tobool7, label %for.inc.9.3, label %for.inc 34 for.inc.9.3: ; preds = %for.inc.9.2 [all …]
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D | double_exit.ll | 21 %I.0 = phi i32 [ 0, %entry ], [ %inc6, %outer.inc ] 22 %Return.0 = phi i32 [ 0, %entry ], [ %Return.1, %outer.inc ] 29 ; Pseudo-edges = outer.inc @ 1/5, exit @ 1/5 34 %Return.1 = phi i32 [ %Return.0, %outer ], [ %call4, %inner.inc ] 35 %J.0 = phi i32 [ %I.0, %outer ], [ %inc, %inner.inc ] 37 br i1 %cmp2, label %inner.body, label %outer.inc, !prof !1 ; 4:1 45 br i1 %tobool, label %exit, label %inner.inc, !prof !0 ; 3:1 49 ; CHECK-NEXT: inner.inc: float = 1.5, 50 inner.inc: 52 %inc = add nsw i32 %J.0, 1 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/BlockFrequencyInfo/ |
D | irreducible_loop_crash.ll | 12 for.inc: 17 br i1 %tobool7, label %for.inc.9, label %for.inc 19 for.inc.9: ; preds = %for.body.5 20 br i1 %tobool7, label %for.inc.9.1, label %for.inc 23 br i1 undef, label %for.end.17, label %for.inc 28 for.inc.9.1: ; preds = %for.inc.9 29 br i1 %tobool7, label %for.inc.9.2, label %for.inc 31 for.inc.9.2: ; preds = %for.inc.9.1 32 br i1 %tobool7, label %for.inc.9.3, label %for.inc 34 for.inc.9.3: ; preds = %for.inc.9.2 [all …]
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D | double_exit.ll | 21 %I.0 = phi i32 [ 0, %entry ], [ %inc6, %outer.inc ] 22 %Return.0 = phi i32 [ 0, %entry ], [ %Return.1, %outer.inc ] 29 ; Pseudo-edges = outer.inc @ 1/5, exit @ 1/5 34 %Return.1 = phi i32 [ %Return.0, %outer ], [ %call4, %inner.inc ] 35 %J.0 = phi i32 [ %I.0, %outer ], [ %inc, %inner.inc ] 37 br i1 %cmp2, label %inner.body, label %outer.inc, !prof !1 ; 4:1 45 br i1 %tobool, label %exit, label %inner.inc, !prof !0 ; 3:1 49 ; CHECK-NEXT: inner.inc: float = 1.5, 50 inner.inc: 52 %inc = add nsw i32 %J.0, 1 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/AlignedBundling/ |
D | autogen-inst-offset-padding.s | 15 inc %eax 25 inc %eax 35 inc %eax 45 inc %eax 55 inc %eax 65 inc %eax 75 inc %eax 85 inc %eax 95 inc %eax 105 inc %eax [all …]
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D | autogen-inst-offset-align-to-end.s | 15 inc %eax 26 inc %eax 37 inc %eax 48 inc %eax 59 inc %eax 70 inc %eax 81 inc %eax 92 inc %eax 103 inc %eax 114 inc %eax [all …]
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/external/llvm/test/MC/X86/AlignedBundling/ |
D | autogen-inst-offset-padding.s | 15 inc %eax 25 inc %eax 35 inc %eax 45 inc %eax 55 inc %eax 65 inc %eax 75 inc %eax 85 inc %eax 95 inc %eax 105 inc %eax [all …]
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D | autogen-inst-offset-align-to-end.s | 15 inc %eax 26 inc %eax 37 inc %eax 48 inc %eax 59 inc %eax 70 inc %eax 81 inc %eax 92 inc %eax 103 inc %eax 114 inc %eax [all …]
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/external/llvm/test/CodeGen/Hexagon/ |
D | hwloop4.ll | 24 %arrayidx.phi = phi i32* [ %arrayidx.inc.7, %for.body ], [ %C, %for.body.preheader9 ] 25 %i.05 = phi i32 [ %inc.7, %for.body ], [ 0, %for.body.preheader9 ] 27 %inc = add i32 %i.05, 1 28 %arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1 29 store i32 %inc, i32* %arrayidx.inc, align 4 30 %inc.1 = add i32 %i.05, 2 31 %arrayidx.inc.1 = getelementptr i32, i32* %arrayidx.phi, i32 2 32 store i32 %inc.1, i32* %arrayidx.inc.1, align 4 33 %inc.2 = add i32 %i.05, 3 34 %arrayidx.inc.2 = getelementptr i32, i32* %arrayidx.phi, i32 3 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
D | hwloop4.ll | 24 %arrayidx.phi = phi i32* [ %arrayidx.inc.7, %for.body ], [ %C, %for.body.preheader9 ] 25 %i.05 = phi i32 [ %inc.7, %for.body ], [ 0, %for.body.preheader9 ] 27 %inc = add i32 %i.05, 1 28 %arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1 29 store i32 %inc, i32* %arrayidx.inc, align 4 30 %inc.1 = add i32 %i.05, 2 31 %arrayidx.inc.1 = getelementptr i32, i32* %arrayidx.phi, i32 2 32 store i32 %inc.1, i32* %arrayidx.inc.1, align 4 33 %inc.2 = add i32 %i.05, 3 34 %arrayidx.inc.2 = getelementptr i32, i32* %arrayidx.phi, i32 3 [all …]
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/external/llvm/test/Transforms/LoopVectorize/ |
D | iv_outside_user.ll | 14 %inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ] 15 %inc = add nsw i32 %inc.phi, 1 16 %cmp = icmp eq i32 %inc, %k 20 ret i32 %inc 37 %inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ] 38 %inc = add nsw i32 %inc.phi, 1 39 %cmp = icmp eq i32 %inc, %k 43 ret i32 %inc.phi 55 %inc.phi = phi i32 [ 32, %entry ], [ %inc, %for.body ] 56 %inc = sub nsw i32 %inc.phi, 2 [all …]
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/external/clang/ |
D | Android.bp | 77 outs: ["clang/Driver/Options.inc"], 84 "clang/AST/AttrDump.inc", 85 "clang/AST/AttrImpl.inc", 86 "clang/AST/Attrs.inc", 87 "clang/AST/AttrVisitor.inc", 88 "clang/Basic/AttrHasAttributeImpl.inc", 89 "clang/Basic/AttrList.inc", 90 "clang/Parse/AttrParserStringSwitches.inc", 91 "clang/Sema/AttrParsedAttrImpl.inc", 92 "clang/Sema/AttrParsedAttrKinds.inc", [all …]
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/external/aac/libSBRenc/src/ |
D | sbr_misc.cpp | 112 INT inc = 1; in FDKsbrEnc_Shellsort_fract() local 115 inc = 3 * inc + 1; in FDKsbrEnc_Shellsort_fract() 116 while (inc <= n); in FDKsbrEnc_Shellsort_fract() 119 inc = inc / 3; in FDKsbrEnc_Shellsort_fract() 120 for (i = inc + 1; i <= n; i++) { in FDKsbrEnc_Shellsort_fract() 123 while (in[j - inc - 1] > v) { in FDKsbrEnc_Shellsort_fract() 124 in[j - 1] = in[j - inc - 1]; in FDKsbrEnc_Shellsort_fract() 125 j -= inc; in FDKsbrEnc_Shellsort_fract() 126 if (j <= inc) break; in FDKsbrEnc_Shellsort_fract() 130 } while (inc > 1); in FDKsbrEnc_Shellsort_fract() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | fma-intrinsics-phi-213-to-231.ll | 12 %c.addr.0 = phi <2 x double> [ %c, %entry ], [ %0, %for.inc ] 13 %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] 18 br label %for.inc 20 for.inc: 22 %inc = add nsw i32 %i.0, 1 38 %c.addr.0 = phi <2 x double> [ %c, %entry ], [ %0, %for.inc ] 39 %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] 44 br label %for.inc 46 for.inc: 48 %inc = add nsw i32 %i.0, 1 [all …]
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/external/llvm/test/CodeGen/X86/ |
D | fma-intrinsics-phi-213-to-231.ll | 12 %c.addr.0 = phi <2 x double> [ %c, %entry ], [ %0, %for.inc ] 13 %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] 18 br label %for.inc 20 for.inc: 22 %inc = add nsw i32 %i.0, 1 38 %c.addr.0 = phi <2 x double> [ %c, %entry ], [ %0, %for.inc ] 39 %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] 44 br label %for.inc 46 for.inc: 48 %inc = add nsw i32 %i.0, 1 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/ |
D | iv_outside_user.ll | 14 %inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ] 15 %inc = add nsw i32 %inc.phi, 1 16 %cmp = icmp eq i32 %inc, %k 20 ret i32 %inc 37 %inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ] 38 %inc = add nsw i32 %inc.phi, 1 39 %cmp = icmp eq i32 %inc, %k 43 ret i32 %inc.phi 55 %inc.phi = phi i32 [ 32, %entry ], [ %inc, %for.body ] 56 %inc = sub nsw i32 %inc.phi, 2 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LICM/ |
D | speculate.ll | 14 for.body: ; preds = %entry, %for.inc 15 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ] 19 br i1 %tobool, label %for.inc, label %if.then 25 br label %for.inc 27 for.inc: ; preds = %if.then, %for.body 28 %inc = add i64 %i.02, 1 29 %cmp = icmp slt i64 %inc, %n 32 for.end: ; preds = %for.inc, %entry 46 for.body: ; preds = %entry, %for.inc 47 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ] [all …]
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/external/llvm/test/Transforms/LICM/ |
D | speculate.ll | 14 for.body: ; preds = %entry, %for.inc 15 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ] 19 br i1 %tobool, label %for.inc, label %if.then 25 br label %for.inc 27 for.inc: ; preds = %if.then, %for.body 28 %inc = add i64 %i.02, 1 29 %cmp = icmp slt i64 %inc, %n 32 for.end: ; preds = %for.inc, %entry 46 for.body: ; preds = %entry, %for.inc 47 %i.02 = phi i64 [ %inc, %for.inc ], [ 0, %entry ] [all …]
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/external/swiftshader/third_party/SPIRV-Tools/ |
D | Android.mk | 181 $(call generate-file-dir,$(1)/core.insts-1.0.inc) 182 $(1)/core.insts-1.0.inc $(1)/operand.kinds-1.0.inc $(1)/glsl.std.450.insts.inc $(1)/opencl.std.inst… 193 --core-insts-output=$(1)/core.insts-1.0.inc \ 194 --glsl-insts-output=$(1)/glsl.std.450.insts.inc \ 195 --opencl-insts-output=$(1)/opencl.std.insts.inc \ 196 --operand-kinds-output=$(1)/operand.kinds-1.0.inc 198 $(1)/core.insts-1.1.inc $(1)/operand.kinds-1.1.inc: \ 205 --core-insts-output=$(1)/core.insts-1.1.inc \ 206 --operand-kinds-output=$(1)/operand.kinds-1.1.inc 208 $(1)/core.insts-1.2.inc $(1)/operand.kinds-1.2.inc: \ [all …]
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/external/apache-commons-math/src/main/java/org/apache/commons/math/dfp/ |
D | DfpDec.java | 215 final boolean inc; in round() 218 inc = false; in round() 222 inc = (n != 0) || (discarded != 0); // round up if n!=0 in round() 226 inc = n >= 5; // round half up in round() 230 inc = n > 5; // round half down in round() 234 inc = (n > 5) || in round() 240 inc = (n > 5) || in round() 246 inc = (sign == 1) && (n != 0 || discarded != 0); // round ceil in round() 251 inc = (sign == -1) && (n != 0 || discarded != 0); // round floor in round() 255 if (inc) { in round() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | Makefile | 15 BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \ 16 ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \ 17 ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \ 18 ARMGenCodeEmitter.inc ARMGenCallingConv.inc \ 19 ARMGenEDInfo.inc ARMGenFastISel.inc ARMGenMCCodeEmitter.inc \ 20 ARMGenMCPseudoLowering.inc ARMGenDisassemblerTables.inc
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/IndVarSimplify/ |
D | post-inc-range.ll | 6 ; icmp slt i32 %i.inc, %limit 7 ; In order to do this indvars need to prove that the narrow IV def (%i.inc) 17 %i = phi i32 [ %start, %for.body.lr.ph ], [ %i.inc, %for.inc ] 25 br label %for.inc 27 for.inc: 28 %i.inc = add nsw nuw i32 %i, 1 29 %cmp = icmp slt i32 %i.inc, %limit 47 %i = phi i32 [ %start, %for.body.lr.ph ], [ %i.inc, %for.inc ] 55 br label %for.inc 57 for.inc: [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | CMakeLists.txt | 3 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher) 4 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer) 5 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv) 6 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel) 7 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler) 8 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info) 9 tablegen(LLVM AMDGPUGenIntrinsicEnums.inc -gen-tgt-intrinsic-enums) 10 tablegen(LLVM AMDGPUGenIntrinsicImpl.inc -gen-tgt-intrinsic-impl) 11 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter) 12 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering) [all …]
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/external/llvm/test/Analysis/Delinearization/ |
D | multidim_only_ivs_3d_cast.ll | 25 %i = phi i64 [ %i.inc, %for.i.inc ], [ 0, %entry ] 29 %j = phi i64 [ %j.inc, %for.j.inc ], [ 0, %for.i ] 33 %k = phi i64 [ %k.inc, %for.k.inc ], [ 0, %for.j ] 43 br label %for.k.inc 45 for.k.inc: 46 %k.inc = add i64 %k, 1 47 %k.inc.trunc = trunc i64 %k.inc to i32 48 %k.exitcond = icmp eq i32 %k.inc.trunc, %o 49 br i1 %k.exitcond, label %for.j.inc, label %for.k 51 for.j.inc: [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/Delinearization/ |
D | multidim_only_ivs_3d_cast.ll | 25 %i = phi i64 [ %i.inc, %for.i.inc ], [ 0, %entry ] 29 %j = phi i64 [ %j.inc, %for.j.inc ], [ 0, %for.i ] 33 %k = phi i64 [ %k.inc, %for.k.inc ], [ 0, %for.j ] 43 br label %for.k.inc 45 for.k.inc: 46 %k.inc = add i64 %k, 1 47 %k.inc.trunc = trunc i64 %k.inc to i32 48 %k.exitcond = icmp eq i32 %k.inc.trunc, %o 49 br i1 %k.exitcond, label %for.j.inc, label %for.k 51 for.j.inc: [all …]
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