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Searched refs:lret (Results 1 – 25 of 29) sorted by relevance

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/external/ltp/lib/
Drandom_range.c735 long lret, lmin = 0, lmult = 1, ltmin, ltmax = 0; local
779 lret = random_rangel(lmin, lmax, lmult, NULL);
781 printf("%ld\n", lret);
782 if (lret < ltmin)
783 ltmin = lret;
784 if (lret > ltmax)
785 ltmax = lret;
787 if (valbound[ind] < lret
788 && lret <= valbound[ind + 1]) {
793 if (lret > valbound[PARTNUM - 1]) {
[all …]
/external/llvm/test/MC/X86/
Dret.s60 lret
87 lret $0
Dx86-16.s618 lret $0x7ace
Dx86-64.s965 lret // CHECK: lretl # encoding: [0xcb] label
Dx86-32-coverage.s1705 lret
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
Dret.s76 lret
103 lret $0
Dx86-16.s630 lret $0x7ace
Dx86-64.s982 lret // CHECK: lretl # encoding: [0xcb] label
Dx86-32-coverage.s1728 lret
/external/ltp/testcases/lib/
Dtst_net.sh211 local lret
237 lret=$?
242 [ $lret -ne 0 ] && tst_res_ TWARN "tst_net_run: lhost command failed: $lret"
246 [ $lret -ne 0 ] && return $lret
/external/u-boot/arch/x86/cpu/i386/
Dcall64.S74 lret
/external/syzkaller/executor/
Dkvm.S83 lret
107 lret
/external/virglrenderer/src/
Dvrend_blitter.c701 GLint lret; in vrend_renderer_blit_gl() local
764 glGetProgramiv(prog_id, GL_LINK_STATUS, &lret); in vrend_renderer_blit_gl()
765 if (lret == GL_FALSE) { in vrend_renderer_blit_gl()
Dvrend_renderer.c1201 GLint lret; in add_cs_shader_program() local
1206 glGetProgramiv(prog_id, GL_LINK_STATUS, &lret); in add_cs_shader_program()
1207 if (lret == GL_FALSE) { in add_cs_shader_program()
1244 GLint lret; in add_shader_program() local
1329 glGetProgramiv(prog_id, GL_LINK_STATUS, &lret); in add_shader_program()
1330 if (lret == GL_FALSE) { in add_shader_program()
/external/swiftshader/third_party/LLVM/test/MC/X86/
Dx86-64.s829 lret // CHECK: lretl # encoding: [0xcb] label
Dx86-32-coverage.s265 lret
3338 lret
13089 lret
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrControl.td35 "lret\t$amt", []>;
DX86InstrInfo.td1454 // lret maps to lretl, it is not ambiguous with lretq.
1455 def : MnemonicAlias<"lret", "lretl">;
DX86GenAsmMatcher.inc790 Mnemonic = "lretl"; // "lret"
3778 { X86::LRETI, "lret", Convert__Imm1_0, { MCK_Imm }, 0},
DX86GenAsmWriter.inc3918 "\t\000lret\t\000lretw\t\000lretl\000lretq\000lslw\t\000lsll\t\000lslq\t"
/external/elfutils/libcpu/defs/
Di386494 11001011:lret
495 11001010,{imm16}:lret {imm16}
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dschedule-x86_32.ll2170 call void asm sideeffect "ret \0A\09 ret $0 \0A\09 lret \0A\09 lret $0", "i"(i16 4095)
/external/llvm/lib/Target/X86/
DX86InstrInfo.td2580 // In 64-bit mode lret maps to lretl; it is not ambiguous with lretq.
2581 def : MnemonicAlias<"lret", "lretw", "att">, Requires<[In16BitMode]>;
2582 def : MnemonicAlias<"lret", "lretl", "att">, Requires<[Not16BitMode]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrInfo.td2961 // In 64-bit mode lret maps to lretl; it is not ambiguous with lretq.
2962 def : MnemonicAlias<"lret", "lretw", "att">, Requires<[In16BitMode]>;
2963 def : MnemonicAlias<"lret", "lretl", "att">, Requires<[Not16BitMode]>;
/external/elfutils/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...

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